1 ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
5 ; FUNC-LABEL: @fmul_f32
6 ; R600: MUL_IEEE {{\** *}}{{T[0-9]+\.[XYZW]}}, KC0[2].Z, KC0[2].W
9 define void @fmul_f32(float addrspace(1)* %out, float %a, float %b) {
11 %0 = fmul float %a, %b
12 store float %0, float addrspace(1)* %out
16 declare float @llvm.R600.load.input(i32) readnone
18 declare void @llvm.AMDGPU.store.output(float, i32)
20 ; FUNC-LABEL: @fmul_v2f32
21 ; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}}
22 ; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}}
26 define void @fmul_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %a, <2 x float> %b) {
28 %0 = fmul <2 x float> %a, %b
29 store <2 x float> %0, <2 x float> addrspace(1)* %out
33 ; FUNC-LABEL: @fmul_v4f32
34 ; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
35 ; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
36 ; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
37 ; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
43 define void @fmul_v4f32(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in) {
44 %b_ptr = getelementptr <4 x float> addrspace(1)* %in, i32 1
45 %a = load <4 x float> addrspace(1) * %in
46 %b = load <4 x float> addrspace(1) * %b_ptr
47 %result = fmul <4 x float> %a, %b
48 store <4 x float> %result, <4 x float> addrspace(1)* %out