1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
4 ; CHECK: MUL_IEEE * {{T[0-9]+\.[XYZW], PV\.[xyzw], PV\.[xyzw]}}
6 define void @fmul_f32() {
7 %r0 = call float @llvm.R600.load.input(i32 0)
8 %r1 = call float @llvm.R600.load.input(i32 1)
9 %r2 = fmul float %r0, %r1
10 call void @llvm.AMDGPU.store.output(float %r2, i32 0)
14 declare float @llvm.R600.load.input(i32) readnone
16 declare void @llvm.AMDGPU.store.output(float, i32)
19 ; CHECK: MUL_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
20 ; CHECK: MUL_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
21 ; CHECK: MUL_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
22 ; CHECK: MUL_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
24 define void @fmul_v4f32(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in) {
25 %b_ptr = getelementptr <4 x float> addrspace(1)* %in, i32 1
26 %a = load <4 x float> addrspace(1) * %in
27 %b = load <4 x float> addrspace(1) * %b_ptr
28 %result = fmul <4 x float> %a, %b
29 store <4 x float> %result, <4 x float> addrspace(1)* %out