1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
3 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
5 ; FUNC-LABEL: {{^}}fneg_fabs_fadd_f32:
7 ; SI: v_sub_f32_e64 {{v[0-9]+}}, {{s[0-9]+}}, |{{v[0-9]+}}|
8 define void @fneg_fabs_fadd_f32(float addrspace(1)* %out, float %x, float %y) {
9 %fabs = call float @llvm.fabs.f32(float %x)
10 %fsub = fsub float -0.000000e+00, %fabs
11 %fadd = fadd float %y, %fsub
12 store float %fadd, float addrspace(1)* %out, align 4
16 ; FUNC-LABEL: {{^}}fneg_fabs_fmul_f32:
18 ; SI: v_mul_f32_e64 {{v[0-9]+}}, {{s[0-9]+}}, -|{{v[0-9]+}}|
20 define void @fneg_fabs_fmul_f32(float addrspace(1)* %out, float %x, float %y) {
21 %fabs = call float @llvm.fabs.f32(float %x)
22 %fsub = fsub float -0.000000e+00, %fabs
23 %fmul = fmul float %y, %fsub
24 store float %fmul, float addrspace(1)* %out, align 4
28 ; DAGCombiner will transform:
29 ; (fabs (f32 bitcast (i32 a))) => (f32 bitcast (and (i32 a), 0x7FFFFFFF))
30 ; unless isFabsFree returns true
32 ; FUNC-LABEL: {{^}}fneg_fabs_free_f32:
34 ; R600: |PV.{{[XYZW]}}|
37 ; SI: v_mov_b32_e32 [[IMMREG:v[0-9]+]], 0x80000000
38 ; SI: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
39 define void @fneg_fabs_free_f32(float addrspace(1)* %out, i32 %in) {
40 %bc = bitcast i32 %in to float
41 %fabs = call float @llvm.fabs.f32(float %bc)
42 %fsub = fsub float -0.000000e+00, %fabs
43 store float %fsub, float addrspace(1)* %out
47 ; FUNC-LABEL: {{^}}fneg_fabs_fn_free_f32:
49 ; R600: |PV.{{[XYZW]}}|
52 ; SI: v_mov_b32_e32 [[IMMREG:v[0-9]+]], 0x80000000
53 ; SI: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
54 define void @fneg_fabs_fn_free_f32(float addrspace(1)* %out, i32 %in) {
55 %bc = bitcast i32 %in to float
56 %fabs = call float @fabs(float %bc)
57 %fsub = fsub float -0.000000e+00, %fabs
58 store float %fsub, float addrspace(1)* %out
62 ; FUNC-LABEL: {{^}}fneg_fabs_f32:
63 ; SI: v_mov_b32_e32 [[IMMREG:v[0-9]+]], 0x80000000
64 ; SI: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
65 define void @fneg_fabs_f32(float addrspace(1)* %out, float %in) {
66 %fabs = call float @llvm.fabs.f32(float %in)
67 %fsub = fsub float -0.000000e+00, %fabs
68 store float %fsub, float addrspace(1)* %out, align 4
72 ; FUNC-LABEL: {{^}}v_fneg_fabs_f32:
73 ; SI: v_or_b32_e32 v{{[0-9]+}}, 0x80000000, v{{[0-9]+}}
74 define void @v_fneg_fabs_f32(float addrspace(1)* %out, float addrspace(1)* %in) {
75 %val = load float, float addrspace(1)* %in, align 4
76 %fabs = call float @llvm.fabs.f32(float %val)
77 %fsub = fsub float -0.000000e+00, %fabs
78 store float %fsub, float addrspace(1)* %out, align 4
82 ; FUNC-LABEL: {{^}}fneg_fabs_v2f32:
83 ; R600: |{{(PV|T[0-9])\.[XYZW]}}|
85 ; R600: |{{(PV|T[0-9])\.[XYZW]}}|
88 ; FIXME: SGPR should be used directly for first src operand.
89 ; SI: v_mov_b32_e32 [[IMMREG:v[0-9]+]], 0x80000000
91 ; SI: v_or_b32_e32 v{{[0-9]+}}, v{{[0-9]+}}, [[IMMREG]]
92 ; SI: v_or_b32_e32 v{{[0-9]+}}, v{{[0-9]+}}, [[IMMREG]]
93 define void @fneg_fabs_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %in) {
94 %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %in)
95 %fsub = fsub <2 x float> <float -0.000000e+00, float -0.000000e+00>, %fabs
96 store <2 x float> %fsub, <2 x float> addrspace(1)* %out
100 ; FIXME: SGPR should be used directly for first src operand.
101 ; FUNC-LABEL: {{^}}fneg_fabs_v4f32:
102 ; SI: v_mov_b32_e32 [[IMMREG:v[0-9]+]], 0x80000000
104 ; SI: v_or_b32_e32 v{{[0-9]+}}, v{{[0-9]+}}, [[IMMREG]]
105 ; SI: v_or_b32_e32 v{{[0-9]+}}, v{{[0-9]+}}, [[IMMREG]]
106 ; SI: v_or_b32_e32 v{{[0-9]+}}, v{{[0-9]+}}, [[IMMREG]]
107 ; SI: v_or_b32_e32 v{{[0-9]+}}, v{{[0-9]+}}, [[IMMREG]]
108 define void @fneg_fabs_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) {
109 %fabs = call <4 x float> @llvm.fabs.v4f32(<4 x float> %in)
110 %fsub = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %fabs
111 store <4 x float> %fsub, <4 x float> addrspace(1)* %out
115 declare float @fabs(float) readnone
116 declare float @llvm.fabs.f32(float) readnone
117 declare <2 x float> @llvm.fabs.v2f32(<2 x float>) readnone
118 declare <4 x float> @llvm.fabs.v4f32(<4 x float>) readnone