1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK
2 ; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK
4 ; DAGCombiner will transform:
5 ; (fabs (f32 bitcast (i32 a))) => (f32 bitcast (and (i32 a), 0x7FFFFFFF))
6 ; unless isFabsFree returns true
8 ; R600-CHECK-LABEL: @fneg_fabs_free
10 ; R600-CHECK: |PV.{{[XYZW]}}|
12 ; SI-CHECK-LABEL: @fneg_fabs_free
15 define void @fneg_fabs_free(float addrspace(1)* %out, i32 %in) {
17 %0 = bitcast i32 %in to float
18 %1 = call float @fabs(float %0)
19 %2 = fsub float -0.000000e+00, %1
20 store float %2, float addrspace(1)* %out
24 ; R600-CHECK-LABEL: @fneg_fabs_v2
25 ; R600-CHECK: |{{(PV|T[0-9])\.[XYZW]}}|
27 ; R600-CHECK: |{{(PV|T[0-9])\.[XYZW]}}|
29 ; SI-CHECK-LABEL: @fneg_fabs_v2
32 define void @fneg_fabs_v2(<2 x float> addrspace(1)* %out, <2 x float> %in) {
34 %0 = call <2 x float> @llvm.fabs.v2f32(<2 x float> %in)
35 %1 = fsub <2 x float> <float -0.000000e+00, float -0.000000e+00>, %0
36 store <2 x float> %1, <2 x float> addrspace(1)* %out
40 ; SI-CHECK-LABEL: @fneg_fabs_v4
45 define void @fneg_fabs_v4(<4 x float> addrspace(1)* %out, <4 x float> %in) {
47 %0 = call <4 x float> @llvm.fabs.v4f32(<4 x float> %in)
48 %1 = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %0
49 store <4 x float> %1, <4 x float> addrspace(1)* %out
53 declare float @fabs(float ) readnone
54 declare <2 x float> @llvm.fabs.v2f32(<2 x float> ) readnone
55 declare <4 x float> @llvm.fabs.v4f32(<4 x float> ) readnone