1 ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
4 ; FUNC-LABEL: @fneg_fabs_fadd_f32
6 ; SI: V_SUB_F32_e64 {{v[0-9]+}}, {{s[0-9]+}}, |{{v[0-9]+}}|
7 define void @fneg_fabs_fadd_f32(float addrspace(1)* %out, float %x, float %y) {
8 %fabs = call float @llvm.fabs.f32(float %x)
9 %fsub = fsub float -0.000000e+00, %fabs
10 %fadd = fadd float %y, %fsub
11 store float %fadd, float addrspace(1)* %out, align 4
15 ; FUNC-LABEL: @fneg_fabs_fmul_f32
17 ; SI: V_MUL_F32_e64 {{v[0-9]+}}, {{s[0-9]+}}, -|{{v[0-9]+}}|
19 define void @fneg_fabs_fmul_f32(float addrspace(1)* %out, float %x, float %y) {
20 %fabs = call float @llvm.fabs.f32(float %x)
21 %fsub = fsub float -0.000000e+00, %fabs
22 %fmul = fmul float %y, %fsub
23 store float %fmul, float addrspace(1)* %out, align 4
27 ; DAGCombiner will transform:
28 ; (fabs (f32 bitcast (i32 a))) => (f32 bitcast (and (i32 a), 0x7FFFFFFF))
29 ; unless isFabsFree returns true
31 ; FUNC-LABEL: @fneg_fabs_free_f32
33 ; R600: |PV.{{[XYZW]}}|
36 ; SI: V_MOV_B32_e32 [[IMMREG:v[0-9]+]], 0x80000000
37 ; SI: V_OR_B32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
38 define void @fneg_fabs_free_f32(float addrspace(1)* %out, i32 %in) {
39 %bc = bitcast i32 %in to float
40 %fabs = call float @llvm.fabs.f32(float %bc)
41 %fsub = fsub float -0.000000e+00, %fabs
42 store float %fsub, float addrspace(1)* %out
46 ; FUNC-LABEL: @fneg_fabs_fn_free_f32
48 ; R600: |PV.{{[XYZW]}}|
51 ; SI: V_MOV_B32_e32 [[IMMREG:v[0-9]+]], 0x80000000
52 ; SI: V_OR_B32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
53 define void @fneg_fabs_fn_free_f32(float addrspace(1)* %out, i32 %in) {
54 %bc = bitcast i32 %in to float
55 %fabs = call float @fabs(float %bc)
56 %fsub = fsub float -0.000000e+00, %fabs
57 store float %fsub, float addrspace(1)* %out
61 ; FUNC-LABEL: @fneg_fabs_f32
62 ; SI: V_MOV_B32_e32 [[IMMREG:v[0-9]+]], 0x80000000
63 ; SI: V_OR_B32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
64 define void @fneg_fabs_f32(float addrspace(1)* %out, float %in) {
65 %fabs = call float @llvm.fabs.f32(float %in)
66 %fsub = fsub float -0.000000e+00, %fabs
67 store float %fsub, float addrspace(1)* %out, align 4
71 ; FUNC-LABEL: @v_fneg_fabs_f32
72 ; SI: V_OR_B32_e32 v{{[0-9]+}}, 0x80000000, v{{[0-9]+}}
73 define void @v_fneg_fabs_f32(float addrspace(1)* %out, float addrspace(1)* %in) {
74 %val = load float addrspace(1)* %in, align 4
75 %fabs = call float @llvm.fabs.f32(float %val)
76 %fsub = fsub float -0.000000e+00, %fabs
77 store float %fsub, float addrspace(1)* %out, align 4
81 ; FUNC-LABEL: @fneg_fabs_v2f32
82 ; R600: |{{(PV|T[0-9])\.[XYZW]}}|
84 ; R600: |{{(PV|T[0-9])\.[XYZW]}}|
87 ; FIXME: SGPR should be used directly for first src operand.
88 ; SI: V_MOV_B32_e32 [[IMMREG:v[0-9]+]], 0x80000000
90 ; SI: V_OR_B32_e32 v{{[0-9]+}}, v{{[0-9]+}}, [[IMMREG]]
91 ; SI: V_OR_B32_e32 v{{[0-9]+}}, v{{[0-9]+}}, [[IMMREG]]
92 define void @fneg_fabs_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %in) {
93 %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %in)
94 %fsub = fsub <2 x float> <float -0.000000e+00, float -0.000000e+00>, %fabs
95 store <2 x float> %fsub, <2 x float> addrspace(1)* %out
99 ; FIXME: SGPR should be used directly for first src operand.
100 ; FUNC-LABEL: @fneg_fabs_v4f32
101 ; SI: V_MOV_B32_e32 [[IMMREG:v[0-9]+]], 0x80000000
103 ; SI: V_OR_B32_e32 v{{[0-9]+}}, v{{[0-9]+}}, [[IMMREG]]
104 ; SI: V_OR_B32_e32 v{{[0-9]+}}, v{{[0-9]+}}, [[IMMREG]]
105 ; SI: V_OR_B32_e32 v{{[0-9]+}}, v{{[0-9]+}}, [[IMMREG]]
106 ; SI: V_OR_B32_e32 v{{[0-9]+}}, v{{[0-9]+}}, [[IMMREG]]
107 define void @fneg_fabs_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) {
108 %fabs = call <4 x float> @llvm.fabs.v4f32(<4 x float> %in)
109 %fsub = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %fabs
110 store <4 x float> %fsub, <4 x float> addrspace(1)* %out
114 declare float @fabs(float) readnone
115 declare float @llvm.fabs.f32(float) readnone
116 declare <2 x float> @llvm.fabs.v2f32(<2 x float>) readnone
117 declare <4 x float> @llvm.fabs.v4f32(<4 x float>) readnone