1 ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
3 declare i1 @llvm.AMDGPU.class.f32(float, i32) #1
4 declare i1 @llvm.AMDGPU.class.f64(double, i32) #1
5 declare i32 @llvm.r600.read.tidig.x() #1
6 declare float @llvm.fabs.f32(float) #1
7 declare double @llvm.fabs.f64(double) #1
9 ; SI-LABEL: {{^}}test_isinf_pattern:
10 ; SI: v_mov_b32_e32 [[MASK:v[0-9]+]], 0x204{{$}}
11 ; SI: v_cmp_class_f32_e32 vcc, s{{[0-9]+}}, [[MASK]]
14 define void @test_isinf_pattern(i32 addrspace(1)* nocapture %out, float %x) #0 {
15 %fabs = tail call float @llvm.fabs.f32(float %x) #1
16 %cmp = fcmp oeq float %fabs, 0x7FF0000000000000
17 %ext = zext i1 %cmp to i32
18 store i32 %ext, i32 addrspace(1)* %out, align 4
22 ; SI-LABEL: {{^}}test_not_isinf_pattern_0:
25 define void @test_not_isinf_pattern_0(i32 addrspace(1)* nocapture %out, float %x) #0 {
26 %fabs = tail call float @llvm.fabs.f32(float %x) #1
27 %cmp = fcmp ueq float %fabs, 0x7FF0000000000000
28 %ext = zext i1 %cmp to i32
29 store i32 %ext, i32 addrspace(1)* %out, align 4
33 ; SI-LABEL: {{^}}test_not_isinf_pattern_1:
36 define void @test_not_isinf_pattern_1(i32 addrspace(1)* nocapture %out, float %x) #0 {
37 %fabs = tail call float @llvm.fabs.f32(float %x) #1
38 %cmp = fcmp oeq float %fabs, 0xFFF0000000000000
39 %ext = zext i1 %cmp to i32
40 store i32 %ext, i32 addrspace(1)* %out, align 4
44 ; SI-LABEL: {{^}}test_isfinite_pattern_0:
46 ; SI: v_mov_b32_e32 [[MASK:v[0-9]+]], 0x1f8{{$}}
47 ; SI: v_cmp_class_f32_e32 vcc, s{{[0-9]+}}, [[MASK]]
50 define void @test_isfinite_pattern_0(i32 addrspace(1)* nocapture %out, float %x) #0 {
51 %ord = fcmp ord float %x, 0.000000e+00
52 %x.fabs = tail call float @llvm.fabs.f32(float %x) #1
53 %ninf = fcmp une float %x.fabs, 0x7FF0000000000000
54 %and = and i1 %ord, %ninf
55 %ext = zext i1 %and to i32
56 store i32 %ext, i32 addrspace(1)* %out, align 4
60 ; Use negative infinity
61 ; SI-LABEL: {{^}}test_isfinite_not_pattern_0:
62 ; SI-NOT: v_cmp_class_f32
64 define void @test_isfinite_not_pattern_0(i32 addrspace(1)* nocapture %out, float %x) #0 {
65 %ord = fcmp ord float %x, 0.000000e+00
66 %x.fabs = tail call float @llvm.fabs.f32(float %x) #1
67 %ninf = fcmp une float %x.fabs, 0xFFF0000000000000
68 %and = and i1 %ord, %ninf
69 %ext = zext i1 %and to i32
70 store i32 %ext, i32 addrspace(1)* %out, align 4
75 ; SI-LABEL: {{^}}test_isfinite_not_pattern_1:
76 ; SI-NOT: v_cmp_class_f32
78 define void @test_isfinite_not_pattern_1(i32 addrspace(1)* nocapture %out, float %x) #0 {
79 %ord = fcmp ord float %x, 0.000000e+00
80 %ninf = fcmp une float %x, 0x7FF0000000000000
81 %and = and i1 %ord, %ninf
82 %ext = zext i1 %and to i32
83 store i32 %ext, i32 addrspace(1)* %out, align 4
87 ; fabs of different value
88 ; SI-LABEL: {{^}}test_isfinite_not_pattern_2:
89 ; SI-NOT: v_cmp_class_f32
91 define void @test_isfinite_not_pattern_2(i32 addrspace(1)* nocapture %out, float %x, float %y) #0 {
92 %ord = fcmp ord float %x, 0.000000e+00
93 %x.fabs = tail call float @llvm.fabs.f32(float %y) #1
94 %ninf = fcmp une float %x.fabs, 0x7FF0000000000000
95 %and = and i1 %ord, %ninf
96 %ext = zext i1 %and to i32
97 store i32 %ext, i32 addrspace(1)* %out, align 4
101 ; Wrong ordered compare type
102 ; SI-LABEL: {{^}}test_isfinite_not_pattern_3:
103 ; SI-NOT: v_cmp_class_f32
105 define void @test_isfinite_not_pattern_3(i32 addrspace(1)* nocapture %out, float %x) #0 {
106 %ord = fcmp uno float %x, 0.000000e+00
107 %x.fabs = tail call float @llvm.fabs.f32(float %x) #1
108 %ninf = fcmp une float %x.fabs, 0x7FF0000000000000
109 %and = and i1 %ord, %ninf
110 %ext = zext i1 %and to i32
111 store i32 %ext, i32 addrspace(1)* %out, align 4
115 ; Wrong unordered compare
116 ; SI-LABEL: {{^}}test_isfinite_not_pattern_4:
117 ; SI-NOT: v_cmp_class_f32
119 define void @test_isfinite_not_pattern_4(i32 addrspace(1)* nocapture %out, float %x) #0 {
120 %ord = fcmp ord float %x, 0.000000e+00
121 %x.fabs = tail call float @llvm.fabs.f32(float %x) #1
122 %ninf = fcmp one float %x.fabs, 0x7FF0000000000000
123 %and = and i1 %ord, %ninf
124 %ext = zext i1 %and to i32
125 store i32 %ext, i32 addrspace(1)* %out, align 4
129 attributes #0 = { nounwind }
130 attributes #1 = { nounwind readnone }