1 ;RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s
4 ;CHECK-NEXT: V_INTERP_MOV_F32
8 call void @llvm.AMDGPU.shader.type(i32 0)
9 %0 = load i32 addrspace(8)* inttoptr (i32 6 to i32 addrspace(8)*)
10 %1 = call float @llvm.SI.fs.interp.constant(i32 0, i32 0, i32 %0)
11 %2 = call i32 @llvm.SI.packf16(float %1, float %1)
12 %3 = bitcast i32 %2 to float
13 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %3, float %3, float %3, float %3)
17 declare void @llvm.AMDGPU.shader.type(i32)
19 declare float @llvm.SI.fs.interp.constant(i32, i32, i32) readonly
21 declare i32 @llvm.SI.packf16(float, float) readnone
23 declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)