1 ;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck %s
10 ;CHECK: IMAGE_SAMPLE_C
13 ;CHECK: IMAGE_SAMPLE_C
14 ;CHECK: IMAGE_SAMPLE_C
15 ;CHECK: IMAGE_SAMPLE_C
20 define void @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
21 %v1 = insertelement <4 x i32> undef, i32 %a1, i32 0
22 %v2 = insertelement <4 x i32> undef, i32 %a1, i32 1
23 %v3 = insertelement <4 x i32> undef, i32 %a1, i32 2
24 %v4 = insertelement <4 x i32> undef, i32 %a1, i32 3
25 %v5 = insertelement <4 x i32> undef, i32 %a2, i32 0
26 %v6 = insertelement <4 x i32> undef, i32 %a2, i32 1
27 %v7 = insertelement <4 x i32> undef, i32 %a2, i32 2
28 %v8 = insertelement <4 x i32> undef, i32 %a2, i32 3
29 %v9 = insertelement <4 x i32> undef, i32 %a3, i32 0
30 %v10 = insertelement <4 x i32> undef, i32 %a3, i32 1
31 %v11 = insertelement <4 x i32> undef, i32 %a3, i32 2
32 %v12 = insertelement <4 x i32> undef, i32 %a3, i32 3
33 %v13 = insertelement <4 x i32> undef, i32 %a4, i32 0
34 %v14 = insertelement <4 x i32> undef, i32 %a4, i32 1
35 %v15 = insertelement <4 x i32> undef, i32 %a4, i32 2
36 %v16 = insertelement <4 x i32> undef, i32 %a4, i32 3
37 %res1 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v1,
38 <8 x i32> undef, <4 x i32> undef, i32 1)
39 %res2 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v2,
40 <8 x i32> undef, <4 x i32> undef, i32 2)
41 %res3 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v3,
42 <8 x i32> undef, <4 x i32> undef, i32 3)
43 %res4 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v4,
44 <8 x i32> undef, <4 x i32> undef, i32 4)
45 %res5 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v5,
46 <8 x i32> undef, <4 x i32> undef, i32 5)
47 %res6 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v6,
48 <8 x i32> undef, <4 x i32> undef, i32 6)
49 %res7 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v7,
50 <8 x i32> undef, <4 x i32> undef, i32 7)
51 %res8 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v8,
52 <8 x i32> undef, <4 x i32> undef, i32 8)
53 %res9 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v9,
54 <8 x i32> undef, <4 x i32> undef, i32 9)
55 %res10 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v10,
56 <8 x i32> undef, <4 x i32> undef, i32 10)
57 %res11 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v11,
58 <8 x i32> undef, <4 x i32> undef, i32 11)
59 %res12 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v12,
60 <8 x i32> undef, <4 x i32> undef, i32 12)
61 %res13 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v13,
62 <8 x i32> undef, <4 x i32> undef, i32 13)
63 %res14 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v14,
64 <8 x i32> undef, <4 x i32> undef, i32 14)
65 %res15 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v15,
66 <8 x i32> undef, <4 x i32> undef, i32 15)
67 %res16 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v16,
68 <8 x i32> undef, <4 x i32> undef, i32 16)
69 %e1 = extractelement <4 x float> %res1, i32 0
70 %e2 = extractelement <4 x float> %res2, i32 0
71 %e3 = extractelement <4 x float> %res3, i32 0
72 %e4 = extractelement <4 x float> %res4, i32 0
73 %e5 = extractelement <4 x float> %res5, i32 0
74 %e6 = extractelement <4 x float> %res6, i32 0
75 %e7 = extractelement <4 x float> %res7, i32 0
76 %e8 = extractelement <4 x float> %res8, i32 0
77 %e9 = extractelement <4 x float> %res9, i32 0
78 %e10 = extractelement <4 x float> %res10, i32 0
79 %e11 = extractelement <4 x float> %res11, i32 0
80 %e12 = extractelement <4 x float> %res12, i32 0
81 %e13 = extractelement <4 x float> %res13, i32 0
82 %e14 = extractelement <4 x float> %res14, i32 0
83 %e15 = extractelement <4 x float> %res15, i32 0
84 %e16 = extractelement <4 x float> %res16, i32 0
85 %s1 = fadd float %e1, %e2
86 %s2 = fadd float %s1, %e3
87 %s3 = fadd float %s2, %e4
88 %s4 = fadd float %s3, %e5
89 %s5 = fadd float %s4, %e6
90 %s6 = fadd float %s5, %e7
91 %s7 = fadd float %s6, %e8
92 %s8 = fadd float %s7, %e9
93 %s9 = fadd float %s8, %e10
94 %s10 = fadd float %s9, %e11
95 %s11 = fadd float %s10, %e12
96 %s12 = fadd float %s11, %e13
97 %s13 = fadd float %s12, %e14
98 %s14 = fadd float %s13, %e15
99 %s15 = fadd float %s14, %e16
100 call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %s15, float %s15, float %s15, float %s15)
104 declare <4 x float> @llvm.SI.sample.(<4 x i32>, <8 x i32>, <4 x i32>, i32) readnone
106 declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)