1 ; RUN: llc -march=amdgcn -mcpu=SI -show-mc-encoding -verify-machineinstrs < %s | FileCheck %s
3 declare i32 @llvm.r600.read.tidig.x() readnone
5 ;;;==========================================================================;;;
7 ;;;==========================================================================;;;
9 ; MUBUF load with an immediate byte offset that fits into 12-bits
10 ; CHECK-LABEL: {{^}}mubuf_load0:
11 ; CHECK: buffer_load_dword v{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0 offset:4 ; encoding: [0x04,0x00,0x30,0xe0
12 define void @mubuf_load0(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
14 %0 = getelementptr i32 addrspace(1)* %in, i64 1
15 %1 = load i32 addrspace(1)* %0
16 store i32 %1, i32 addrspace(1)* %out
20 ; MUBUF load with the largest possible immediate offset
21 ; CHECK-LABEL: {{^}}mubuf_load1:
22 ; CHECK: buffer_load_ubyte v{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0 offset:4095 ; encoding: [0xff,0x0f,0x20,0xe0
23 define void @mubuf_load1(i8 addrspace(1)* %out, i8 addrspace(1)* %in) {
25 %0 = getelementptr i8 addrspace(1)* %in, i64 4095
26 %1 = load i8 addrspace(1)* %0
27 store i8 %1, i8 addrspace(1)* %out
31 ; MUBUF load with an immediate byte offset that doesn't fit into 12-bits
32 ; CHECK-LABEL: {{^}}mubuf_load2:
33 ; CHECK: buffer_load_dword v{{[0-9]}}, v[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], 0 addr64 ; encoding: [0x00,0x80,0x30,0xe0
34 define void @mubuf_load2(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
36 %0 = getelementptr i32 addrspace(1)* %in, i64 1024
37 %1 = load i32 addrspace(1)* %0
38 store i32 %1, i32 addrspace(1)* %out
42 ; MUBUF load with a 12-bit immediate offset and a register offset
43 ; CHECK-LABEL: {{^}}mubuf_load3:
45 ; CHECK: buffer_load_dword v{{[0-9]}}, v[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], 0 addr64 offset:4 ; encoding: [0x04,0x80,0x30,0xe0
46 define void @mubuf_load3(i32 addrspace(1)* %out, i32 addrspace(1)* %in, i64 %offset) {
48 %0 = getelementptr i32 addrspace(1)* %in, i64 %offset
49 %1 = getelementptr i32 addrspace(1)* %0, i64 1
50 %2 = load i32 addrspace(1)* %1
51 store i32 %2, i32 addrspace(1)* %out
55 ; CHECK-LABEL: {{^}}soffset_max_imm:
56 ; CHECK: buffer_load_dword v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+}}:{{[0-9]+}}], 64 offen glc
57 define void @soffset_max_imm([6 x <16 x i8>] addrspace(2)* byval, [17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32, i32) #1 {
59 %tmp0 = getelementptr [6 x <16 x i8>] addrspace(2)* %0, i32 0, i32 0
60 %tmp1 = load <16 x i8> addrspace(2)* %tmp0
62 %tmp3 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %tmp1, i32 %tmp2, i32 64, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0)
63 %tmp4 = add i32 %6, 16
64 %tmp5 = bitcast float 0.0 to i32
65 call void @llvm.SI.tbuffer.store.i32(<16 x i8> %tmp1, i32 %tmp5, i32 1, i32 %tmp4, i32 %4, i32 0, i32 4, i32 4, i32 1, i32 0, i32 1, i32 1, i32 0)
69 ; Make sure immediates that aren't inline constants don't get folded into
70 ; the soffset operand.
71 ; FIXME: for this test we should be smart enough to shift the immediate into
73 ; CHECK-LABEL: {{^}}soffset_no_fold:
74 ; CHECK: s_movk_i32 [[SOFFSET:s[0-9]+]], 0x41
75 ; CHECK: buffer_load_dword v{{[0-9+]}}, v{{[0-9+]}}, s[{{[0-9]+}}:{{[0-9]+}}], [[SOFFSET]] offen glc
76 define void @soffset_no_fold([6 x <16 x i8>] addrspace(2)* byval, [17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32, i32) #1 {
78 %tmp0 = getelementptr [6 x <16 x i8>] addrspace(2)* %0, i32 0, i32 0
79 %tmp1 = load <16 x i8> addrspace(2)* %tmp0
81 %tmp3 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %tmp1, i32 %tmp2, i32 65, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0)
82 %tmp4 = add i32 %6, 16
83 %tmp5 = bitcast float 0.0 to i32
84 call void @llvm.SI.tbuffer.store.i32(<16 x i8> %tmp1, i32 %tmp5, i32 1, i32 %tmp4, i32 %4, i32 0, i32 4, i32 4, i32 1, i32 0, i32 1, i32 1, i32 0)
88 declare i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #3
89 declare void @llvm.SI.tbuffer.store.i32(<16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)
91 attributes #1 = { "ShaderType"="2" "unsafe-fp-math"="true" }
92 attributes #3 = { nounwind readonly }
94 ;;;==========================================================================;;;
96 ;;;==========================================================================;;;
98 ; MUBUF store with an immediate byte offset that fits into 12-bits
99 ; CHECK-LABEL: {{^}}mubuf_store0:
100 ; CHECK: buffer_store_dword v{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0 offset:4 ; encoding: [0x04,0x00,0x70,0xe0
101 define void @mubuf_store0(i32 addrspace(1)* %out) {
103 %0 = getelementptr i32 addrspace(1)* %out, i64 1
104 store i32 0, i32 addrspace(1)* %0
108 ; MUBUF store with the largest possible immediate offset
109 ; CHECK-LABEL: {{^}}mubuf_store1:
110 ; CHECK: buffer_store_byte v{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0 offset:4095 ; encoding: [0xff,0x0f,0x60,0xe0
112 define void @mubuf_store1(i8 addrspace(1)* %out) {
114 %0 = getelementptr i8 addrspace(1)* %out, i64 4095
115 store i8 0, i8 addrspace(1)* %0
119 ; MUBUF store with an immediate byte offset that doesn't fit into 12-bits
120 ; CHECK-LABEL: {{^}}mubuf_store2:
121 ; CHECK: buffer_store_dword v{{[0-9]}}, v[{{[0-9]+:[0-9]+}}], s[{{[0-9]:[0-9]}}], 0 addr64 ; encoding: [0x00,0x80,0x70,0xe0
122 define void @mubuf_store2(i32 addrspace(1)* %out) {
124 %0 = getelementptr i32 addrspace(1)* %out, i64 1024
125 store i32 0, i32 addrspace(1)* %0
129 ; MUBUF store with a 12-bit immediate offset and a register offset
130 ; CHECK-LABEL: {{^}}mubuf_store3:
132 ; CHECK: buffer_store_dword v{{[0-9]}}, v[{{[0-9]:[0-9]}}], s[{{[0-9]:[0-9]}}], 0 addr64 offset:4 ; encoding: [0x04,0x80,0x70,0xe0
133 define void @mubuf_store3(i32 addrspace(1)* %out, i64 %offset) {
135 %0 = getelementptr i32 addrspace(1)* %out, i64 %offset
136 %1 = getelementptr i32 addrspace(1)* %0, i64 1
137 store i32 0, i32 addrspace(1)* %1
141 ; CHECK-LABEL: {{^}}store_sgpr_ptr:
142 ; CHECK: buffer_store_dword v{{[0-9]+}}, s{{\[[0-9]+:[0-9]+\]}}, 0
143 define void @store_sgpr_ptr(i32 addrspace(1)* %out) #0 {
144 store i32 99, i32 addrspace(1)* %out, align 4
148 ; CHECK-LABEL: {{^}}store_sgpr_ptr_offset:
149 ; CHECK: buffer_store_dword v{{[0-9]+}}, s{{\[[0-9]+:[0-9]+\]}}, 0 offset:40
150 define void @store_sgpr_ptr_offset(i32 addrspace(1)* %out) #0 {
151 %out.gep = getelementptr i32 addrspace(1)* %out, i32 10
152 store i32 99, i32 addrspace(1)* %out.gep, align 4
156 ; CHECK-LABEL: {{^}}store_sgpr_ptr_large_offset:
157 ; CHECK: buffer_store_dword v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64
158 define void @store_sgpr_ptr_large_offset(i32 addrspace(1)* %out) #0 {
159 %out.gep = getelementptr i32 addrspace(1)* %out, i32 32768
160 store i32 99, i32 addrspace(1)* %out.gep, align 4
164 ; CHECK-LABEL: {{^}}store_vgpr_ptr:
165 ; CHECK: buffer_store_dword v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64
166 define void @store_vgpr_ptr(i32 addrspace(1)* %out) #0 {
167 %tid = call i32 @llvm.r600.read.tidig.x() readnone
168 %out.gep = getelementptr i32 addrspace(1)* %out, i32 %tid
169 store i32 99, i32 addrspace(1)* %out.gep, align 4