1 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG %s
2 ;RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI %s
5 ; EG: OR_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
6 ; EG: OR_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
9 ; SI: V_OR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
10 ; SI: V_OR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
12 define void @or_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
13 %b_ptr = getelementptr <2 x i32> addrspace(1)* %in, i32 1
14 %a = load <2 x i32> addrspace(1) * %in
15 %b = load <2 x i32> addrspace(1) * %b_ptr
16 %result = or <2 x i32> %a, %b
17 store <2 x i32> %result, <2 x i32> addrspace(1)* %out
22 ; EG: OR_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
23 ; EG: OR_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
24 ; EG: OR_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
25 ; EG: OR_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
28 ; SI: V_OR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
29 ; SI: V_OR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
30 ; SI: V_OR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
31 ; SI: V_OR_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
33 define void @or_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
34 %b_ptr = getelementptr <4 x i32> addrspace(1)* %in, i32 1
35 %a = load <4 x i32> addrspace(1) * %in
36 %b = load <4 x i32> addrspace(1) * %b_ptr
37 %result = or <4 x i32> %a, %b
38 store <4 x i32> %result, <4 x i32> addrspace(1)* %out
42 ; SI-LABEL: @scalar_or_i32
44 define void @scalar_or_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) {
46 store i32 %or, i32 addrspace(1)* %out
50 ; SI-LABEL: @vector_or_i32
51 ; SI: V_OR_B32_e32 v{{[0-9]}}
52 define void @vector_or_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %a, i32 %b) {
53 %loada = load i32 addrspace(1)* %a
54 %or = or i32 %loada, %b
55 store i32 %or, i32 addrspace(1)* %out
59 ; EG-LABEL: @scalar_or_i64
60 ; EG-DAG: OR_INT * T{{[0-9]\.[XYZW]}}, KC0[2].W, KC0[3].Y
61 ; EG-DAG: OR_INT * T{{[0-9]\.[XYZW]}}, KC0[3].X, KC0[3].Z
62 ; SI-LABEL: @scalar_or_i64
64 define void @scalar_or_i64(i64 addrspace(1)* %out, i64 %a, i64 %b) {
66 store i64 %or, i64 addrspace(1)* %out
70 ; SI-LABEL: @vector_or_i64
71 ; SI: V_OR_B32_e32 v{{[0-9]}}
72 ; SI: V_OR_B32_e32 v{{[0-9]}}
73 define void @vector_or_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) {
74 %loada = load i64 addrspace(1)* %a, align 8
75 %loadb = load i64 addrspace(1)* %a, align 8
76 %or = or i64 %loada, %loadb
77 store i64 %or, i64 addrspace(1)* %out
81 ; SI-LABEL: @scalar_vector_or_i64
82 ; SI: V_OR_B32_e32 v{{[0-9]}}
83 ; SI: V_OR_B32_e32 v{{[0-9]}}
84 define void @scalar_vector_or_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 %b) {
85 %loada = load i64 addrspace(1)* %a
86 %or = or i64 %loada, %b
87 store i64 %or, i64 addrspace(1)* %out
91 ; SI-LABEL: @vector_or_i64_loadimm
92 ; SI-DAG: S_MOV_B32 [[LO_S_IMM:s[0-9]+]], 0xdf77987f
93 ; SI-DAG: S_MOV_B32 [[HI_S_IMM:s[0-9]+]], 0x146f
94 ; SI-DAG: BUFFER_LOAD_DWORDX2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}},
95 ; SI-DAG: V_OR_B32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]]
96 ; SI-DAG: V_OR_B32_e32 {{v[0-9]+}}, [[HI_S_IMM]], v[[HI_VREG]]
98 define void @vector_or_i64_loadimm(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) {
99 %loada = load i64 addrspace(1)* %a, align 8
100 %or = or i64 %loada, 22470723082367
101 store i64 %or, i64 addrspace(1)* %out
105 ; FIXME: The or 0 should really be removed.
106 ; SI-LABEL: @vector_or_i64_imm
107 ; SI: BUFFER_LOAD_DWORDX2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}},
108 ; SI: V_OR_B32_e32 {{v[0-9]+}}, 8, v[[LO_VREG]]
109 ; SI: V_OR_B32_e32 {{v[0-9]+}}, 0, {{.*}}
111 define void @vector_or_i64_imm(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) {
112 %loada = load i64 addrspace(1)* %a, align 8
113 %or = or i64 %loada, 8
114 store i64 %or, i64 addrspace(1)* %out
118 ; SI-LABEL: @trunc_i64_or_to_i32
119 ; SI: S_LOAD_DWORD [[SREG0:s[0-9]+]],
120 ; SI: S_LOAD_DWORD [[SREG1:s[0-9]+]],
121 ; SI: S_OR_B32 [[SRESULT:s[0-9]+]], [[SREG1]], [[SREG0]]
122 ; SI: V_MOV_B32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]]
123 ; SI: BUFFER_STORE_DWORD [[VRESULT]],
124 define void @trunc_i64_or_to_i32(i32 addrspace(1)* %out, i64 %a, i64 %b) {
126 %trunc = trunc i64 %add to i32
127 store i32 %trunc, i32 addrspace(1)* %out, align 8