1 ; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s
3 ; In this test both the pointer and the offset operands to the
4 ; BUFFER_LOAD instructions end up being stored in vgprs. This
5 ; requires us to add the pointer and offset together, store the
6 ; result in the offset operand (vaddr), and then store 0 in an
7 ; sgpr register pair and use that for the pointer operand
8 ; (low 64-bits of srsrc).
11 ; Make sure we aren't using VGPRs for the source operand of S_MOV_B64
12 ; CHECK-NOT: S_MOV_B64 s[{{[0-9]+:[0-9]+}}], v
13 define void @mubuf(i32 addrspace(1)* %out, i8 addrspace(1)* %in) {
15 %0 = call i32 @llvm.r600.read.tidig.x() #1
16 %1 = call i32 @llvm.r600.read.tidig.y() #1
17 %2 = sext i32 %0 to i64
18 %3 = sext i32 %1 to i64
22 %4 = phi i64 [0, %entry], [%5, %loop]
24 %6 = getelementptr i8 addrspace(1)* %in, i64 %5
25 %7 = load i8 addrspace(1)* %6, align 1
27 %9 = getelementptr i8 addrspace(1)* %in, i64 %8
28 %10 = load i8 addrspace(1)* %9, align 1
30 %12 = sext i8 %11 to i32
31 store i32 %12, i32 addrspace(1)* %out
32 %13 = icmp slt i64 %5, 10
33 br i1 %13, label %loop, label %done
39 declare i32 @llvm.r600.read.tidig.x() #1
40 declare i32 @llvm.r600.read.tidig.y() #1
42 attributes #1 = { nounwind readnone }