1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
3 ; These tests are for condition codes that are not supported by the hardware
6 ; CHECK: SETGT_INT {{\** *}}T{{[0-9]+\.[XYZW]}}, literal.x, KC0[2].Z
8 ; CHECK-NEXT: 5(7.006492e-45)
9 define void @slt(i32 addrspace(1)* %out, i32 %in) {
11 %0 = icmp slt i32 %in, 5
12 %1 = select i1 %0, i32 -1, i32 0
13 store i32 %1, i32 addrspace(1)* %out
17 ; CHECK-LABEL: @ult_i32
18 ; CHECK: SETGT_UINT {{\** *}}T{{[0-9]+\.[XYZW]}}, literal.x, KC0[2].Z
20 ; CHECK-NEXT: 5(7.006492e-45)
21 define void @ult_i32(i32 addrspace(1)* %out, i32 %in) {
23 %0 = icmp ult i32 %in, 5
24 %1 = select i1 %0, i32 -1, i32 0
25 store i32 %1, i32 addrspace(1)* %out
29 ; CHECK-LABEL: @ult_float
30 ; CHECK: SETGE * T{{[0-9]}}.[[CHAN:[XYZW]]], KC0[2].Z, literal.x
31 ; CHECK-NEXT: 1084227584(5.000000e+00)
32 ; CHECK-NEXT: SETE T{{[0-9]\.[XYZW]}}, PV.[[CHAN]], 0.0
34 define void @ult_float(float addrspace(1)* %out, float %in) {
36 %0 = fcmp ult float %in, 5.0
37 %1 = select i1 %0, float 1.0, float 0.0
38 store float %1, float addrspace(1)* %out
42 ; CHECK-LABEL: @ult_float_native
43 ; CHECK: SETGE T{{[0-9]\.[XYZW]}}, KC0[2].Z, literal.x
45 ; CHECK-NEXT: 1084227584(5.000000e+00)
46 define void @ult_float_native(float addrspace(1)* %out, float %in) {
48 %0 = fcmp ult float %in, 5.0
49 %1 = select i1 %0, float 0.0, float 1.0
50 store float %1, float addrspace(1)* %out
55 ; CHECK: SETGT T{{[0-9]+\.[XYZW]}}, literal.x, KC0[2].Z
57 ; CHECK-NEXT: 1084227584(5.000000e+00)
58 define void @olt(float addrspace(1)* %out, float %in) {
60 %0 = fcmp olt float %in, 5.0
61 %1 = select i1 %0, float 1.0, float 0.0
62 store float %1, float addrspace(1)* %out
67 ; CHECK: SETGT_INT {{\** *}}T{{[0-9]+\.[XYZW]}}, literal.x, KC0[2].Z
69 ; CHECK-NEXT: 6(8.407791e-45)
70 define void @sle(i32 addrspace(1)* %out, i32 %in) {
72 %0 = icmp sle i32 %in, 5
73 %1 = select i1 %0, i32 -1, i32 0
74 store i32 %1, i32 addrspace(1)* %out
78 ; CHECK-LABEL: @ule_i32
79 ; CHECK: SETGT_UINT {{\** *}}T{{[0-9]+\.[XYZW]}}, literal.x, KC0[2].Z
81 ; CHECK-NEXT: 6(8.407791e-45)
82 define void @ule_i32(i32 addrspace(1)* %out, i32 %in) {
84 %0 = icmp ule i32 %in, 5
85 %1 = select i1 %0, i32 -1, i32 0
86 store i32 %1, i32 addrspace(1)* %out
90 ; CHECK-LABEL: @ule_float
91 ; CHECK: SETGT * T{{[0-9]}}.[[CHAN:[XYZW]]], KC0[2].Z, literal.x
92 ; CHECK-NEXT: 1084227584(5.000000e+00)
93 ; CHECK-NEXT: SETE T{{[0-9]\.[XYZW]}}, PV.[[CHAN]], 0.0
95 define void @ule_float(float addrspace(1)* %out, float %in) {
97 %0 = fcmp ule float %in, 5.0
98 %1 = select i1 %0, float 1.0, float 0.0
99 store float %1, float addrspace(1)* %out
103 ; CHECK-LABEL: @ule_float_native
104 ; CHECK: SETGT T{{[0-9]\.[XYZW]}}, KC0[2].Z, literal.x
106 ; CHECK-NEXT: 1084227584(5.000000e+00)
107 define void @ule_float_native(float addrspace(1)* %out, float %in) {
109 %0 = fcmp ule float %in, 5.0
110 %1 = select i1 %0, float 0.0, float 1.0
111 store float %1, float addrspace(1)* %out
116 ; CHECK: SETGE T{{[0-9]\.[XYZW]}}, literal.x, KC0[2].Z
118 ; CHECK-NEXT:1084227584(5.000000e+00)
119 define void @ole(float addrspace(1)* %out, float %in) {
121 %0 = fcmp ole float %in, 5.0
122 %1 = select i1 %0, float 1.0, float 0.0
123 store float %1, float addrspace(1)* %out