1 ; RUN: llc -march=sparc <%s | FileCheck %s -check-prefix=V8
2 ; RUN: llc -march=sparc -mattr=v9 <%s | FileCheck %s -check-prefix=V9
5 define i32 @test_addx(i64 %a, i64 %b, i64 %c) nounwind readnone noinline {
13 ; V9: mov{{e|ne}} %icc
15 %1 = icmp ugt i64 %0, %c
16 %2 = zext i1 %1 to i32
21 define i32 @test_select_int_icc(i32 %a, i32 %b, i32 %c) nounwind readnone noinline {
23 ; V8: test_select_int_icc
26 ; V9: test_select_int_icc
29 ; V9: mov{{e|ne}} %icc
30 %0 = icmp eq i32 %a, 0
31 %1 = select i1 %0, i32 %b, i32 %c
36 define float @test_select_fp_icc(i32 %a, float %f1, float %f2) nounwind readnone noinline {
38 ; V8: test_select_fp_icc
41 ; V9: test_select_fp_icc
44 ; V9: fmovs{{e|ne}} %icc
45 %0 = icmp eq i32 %a, 0
46 %1 = select i1 %0, float %f1, float %f2
50 define double @test_select_dfp_icc(i32 %a, double %f1, double %f2) nounwind readnone noinline {
52 ; V8: test_select_dfp_icc
55 ; V9: test_select_dfp_icc
58 ; V9: fmovd{{e|ne}} %icc
59 %0 = icmp eq i32 %a, 0
60 %1 = select i1 %0, double %f1, double %f2
64 define i32 @test_select_int_fcc(float %f, i32 %a, i32 %b) nounwind readnone noinline {
66 ;V8-LABEL: test_select_int_fcc:
69 ;V9-LABEL: test_select_int_fcc:
72 ;V9: mov{{e|ne}} %fcc0
73 %0 = fcmp une float %f, 0.000000e+00
74 %a.b = select i1 %0, i32 %a, i32 %b
79 define float @test_select_fp_fcc(float %f, float %f1, float %f2) nounwind readnone noinline {
81 ;V8-LABEL: test_select_fp_fcc:
84 ;V9-LABEL: test_select_fp_fcc:
87 ;V9: fmovs{{e|ne}} %fcc0
88 %0 = fcmp une float %f, 0.000000e+00
89 %1 = select i1 %0, float %f1, float %f2
93 define double @test_select_dfp_fcc(double %f, double %f1, double %f2) nounwind readnone noinline {
95 ;V8-LABEL: test_select_dfp_fcc:
98 ;V9-LABEL: test_select_dfp_fcc:
100 ;V9-NOT: {{fbne|fbe}}
101 ;V9: fmovd{{e|ne}} %fcc0
102 %0 = fcmp une double %f, 0.000000e+00
103 %1 = select i1 %0, double %f1, double %f2
107 define i32 @test_float_cc(double %a, double %b, i32 %c, i32 %d) {
109 ; V8-LABEL: test_float_cc
111 ; V8: {{fbl|fbuge}} .LBB
113 ; V8: {{fbule|fbg}} .LBB
115 ; V9-LABEL: test_float_cc
117 ; V9: {{fbl|fbuge}} .LBB
119 ; V9: {{fbule|fbg}} .LBB
121 %0 = fcmp uge double %a, 0.000000e+00
122 br i1 %0, label %loop, label %loop.2
125 %1 = icmp eq i32 %c, 10
126 br i1 %1, label %loop, label %exit.0
129 %2 = fcmp ogt double %b, 0.000000e+00
130 br i1 %2, label %exit.1, label %loop
139 ; V8-LABEL: test_adde_sube
150 ; V9-LABEL: test_adde_sube
161 define void @test_adde_sube(i8* %a, i8* %b, i8* %sum, i8* %diff) {
163 %0 = bitcast i8* %a to i128*
164 %1 = bitcast i8* %b to i128*
168 %5 = bitcast i8* %sum to i128*
169 store i128 %4, i128* %5
170 tail call void asm sideeffect "", "=*m,*m"(i128 *%0, i128* %5) nounwind
173 %8 = bitcast i8* %diff to i128*
174 store i128 %7, i128* %8