1 ; RUN: llc < %s -march=sparcv9 -disable-sparc-delay-filler -disable-sparc-leaf-proc | FileCheck %s
4 ; The save/restore frame is not strictly necessary here, but we would need to
5 ; refer to %o registers instead.
6 ; CHECK: save %sp, -128, %sp
7 ; CHECK: ldx [%fp+2231], [[R2:%[gilo][0-7]]]
8 ; CHECK: ld [%fp+2227], [[R1:%[gilo][0-7]]]
9 ; CHECK: stb %i0, [%i4]
10 ; CHECK: stb %i1, [%i4]
11 ; CHECK: sth %i2, [%i4]
12 ; CHECK: st %i3, [%i4]
13 ; CHECK: stx %i4, [%i4]
14 ; CHECK: st %i5, [%i4]
15 ; CHECK: st [[R1]], [%i4]
16 ; CHECK: stx [[R2]], [%i4]
18 define void @intarg(i8 %a0, ; %i0
24 i32 signext %a6, ; [%fp+BIAS+176]
25 i8* %a7) { ; [%fp+BIAS+184]
28 %p16 = bitcast i8* %a4 to i16*
29 store i16 %a2, i16* %p16
30 %p32 = bitcast i8* %a4 to i32*
31 store i32 %a3, i32* %p32
32 %pp = bitcast i8* %a4 to i8**
33 store i8* %a4, i8** %pp
34 store i32 %a5, i32* %p32
35 store i32 %a6, i32* %p32
36 store i8* %a7, i8** %pp
40 ; CHECK-LABEL: call_intarg:
42 ; CHECK: save %sp, -192, %sp
43 ; Sign-extend and store the full 64 bits.
44 ; CHECK: sra %i0, 0, [[R:%[gilo][0-7]]]
45 ; Use %o0-%o5 for outgoing arguments
47 ; CHECK: stx [[R]], [%sp+2223]
51 define void @call_intarg(i32 %i0, i8* %i1) {
52 call void @intarg(i8 0, i8 1, i16 2, i32 3, i8* undef, i32 5, i32 %i0, i8* %i1)
56 ; CHECK-LABEL: floatarg:
57 ; CHECK: save %sp, -128, %sp
58 ; CHECK: ld [%fp+2307], [[F:%f[0-9]+]]
63 ; CHECK: fadds %f31, [[F]]
64 define double @floatarg(float %a0, ; %f1
80 float %a16, ; [%fp+BIAS+256] (using 8 bytes)
81 double %a17) { ; [%fp+BIAS+264] (using 8 bytes)
82 %d0 = fpext float %a0 to double
83 %s1 = fadd double %a1, %d0
84 %s2 = fadd double %a2, %s1
85 %s3 = fadd double %a3, %s2
86 %s16 = fadd float %a15, %a16
87 %d16 = fpext float %s16 to double
88 %s17 = fadd double %d16, %s3
92 ; CHECK-LABEL: call_floatarg:
93 ; CHECK: save %sp, -272, %sp
94 ; Store 8 bytes in full slot.
95 ; CHECK: std %f2, [%sp+2311]
96 ; Store 4 bytes, right-aligned in slot.
97 ; CHECK: st %f1, [%sp+2307]
98 ; CHECK: fmovd %f2, %f4
99 ; CHECK: call floatarg
102 define void @call_floatarg(float %f1, double %d2, float %f5, double *%p) {
103 %r = call double @floatarg(float %f5, double %d2, double %d2, double %d2,
104 float %f5, float %f5, float %f5, float %f5,
105 float %f5, float %f5, float %f5, float %f5,
106 float %f5, float %f5, float %f5, float %f5,
107 float %f1, double %d2)
108 store double %r, double* %p
112 ; CHECK-LABEL: mixedarg:
113 ; CHECK: ldx [%fp+2247]
114 ; CHECK: ldx [%fp+2231]
118 define void @mixedarg(i8 %a0, ; %i0
124 i64 %a6, ; [%fp+BIAS+176]
125 double *%a7, ; [%fp+BIAS+184]
127 i16* %a9) { ; [%fp+BIAS+200]
128 %d1 = fpext float %a1 to double
129 %s3 = fadd double %a3, %d1
130 %s8 = fadd double %a8, %s3
131 store double %s8, double* %a7
132 store i16 %a2, i16* %a9
136 ; CHECK-LABEL: call_mixedarg:
137 ; CHECK: stx %i2, [%sp+2247]
138 ; CHECK: stx %i0, [%sp+2223]
139 ; CHECK: fmovd %f2, %f6
140 ; CHECK: fmovd %f2, %f16
141 ; CHECK: call mixedarg
144 define void @call_mixedarg(i64 %i0, double %f2, i16* %i2) {
145 call void @mixedarg(i8 undef,
158 ; The inreg attribute is used to indicate 32-bit sized struct elements that
159 ; share an 8-byte slot.
160 ; CHECK-LABEL: inreg_fi:
162 ; CHECK: srlx %i0, 32, [[R:%[gilo][0-7]]]
164 define i32 @inreg_fi(i32 inreg %a0, ; high bits of %i0
165 float inreg %a1) { ; %f1
166 %b1 = fptosi float %a1 to i32
167 %rv = sub i32 %a0, %b1
171 ; CHECK-LABEL: call_inreg_fi:
172 ; Allocate space for 6 arguments, even when only 2 are used.
173 ; CHECK: save %sp, -176, %sp
174 ; CHECK: sllx %i1, 32, %o0
175 ; CHECK: fmovs %f5, %f1
176 ; CHECK: call inreg_fi
177 define void @call_inreg_fi(i32* %p, i32 %i1, float %f5) {
178 %x = call i32 @inreg_fi(i32 %i1, float %f5)
182 ; CHECK-LABEL: inreg_ff:
183 ; CHECK: fsubs %f0, %f1, %f0
184 define float @inreg_ff(float inreg %a0, ; %f0
185 float inreg %a1) { ; %f1
186 %rv = fsub float %a0, %a1
190 ; CHECK-LABEL: call_inreg_ff:
191 ; CHECK: fmovs %f3, %f0
192 ; CHECK: fmovs %f5, %f1
193 ; CHECK: call inreg_ff
194 define void @call_inreg_ff(i32* %p, float %f3, float %f5) {
195 %x = call float @inreg_ff(float %f3, float %f5)
199 ; CHECK-LABEL: inreg_if:
202 define i32 @inreg_if(float inreg %a0, ; %f0
203 i32 inreg %a1) { ; low bits of %i0
204 %b0 = fptosi float %a0 to i32
205 %rv = sub i32 %a1, %b0
209 ; CHECK-LABEL: call_inreg_if:
210 ; CHECK: fmovs %f3, %f0
211 ; CHECK: mov %i2, %o0
212 ; CHECK: call inreg_if
213 define void @call_inreg_if(i32* %p, float %f3, i32 %i2) {
214 %x = call i32 @inreg_if(float %f3, i32 %i2)
218 ; The frontend shouldn't do this. Just pass i64 instead.
219 ; CHECK-LABEL: inreg_ii:
220 ; CHECK: srlx %i0, 32, [[R:%[gilo][0-7]]]
221 ; CHECK: sub %i0, [[R]], %i0
222 define i32 @inreg_ii(i32 inreg %a0, ; high bits of %i0
223 i32 inreg %a1) { ; low bits of %i0
224 %rv = sub i32 %a1, %a0
228 ; CHECK-LABEL: call_inreg_ii:
229 ; CHECK: srl %i2, 0, [[R2:%[gilo][0-7]]]
230 ; CHECK: sllx %i1, 32, [[R1:%[gilo][0-7]]]
231 ; CHECK: or [[R1]], [[R2]], %o0
232 ; CHECK: call inreg_ii
233 define void @call_inreg_ii(i32* %p, i32 %i1, i32 %i2) {
234 %x = call i32 @inreg_ii(i32 %i1, i32 %i2)
238 ; Structs up to 32 bytes in size can be returned in registers.
239 ; CHECK-LABEL: ret_i64_pair:
240 ; CHECK: ldx [%i2], %i0
241 ; CHECK: ldx [%i3], %i1
242 define { i64, i64 } @ret_i64_pair(i32 %a0, i32 %a1, i64* %p, i64* %q) {
243 %r1 = load i64, i64* %p
244 %rv1 = insertvalue { i64, i64 } undef, i64 %r1, 0
246 %r2 = load i64, i64* %q
247 %rv2 = insertvalue { i64, i64 } %rv1, i64 %r2, 1
248 ret { i64, i64 } %rv2
251 ; CHECK-LABEL: call_ret_i64_pair:
252 ; CHECK: call ret_i64_pair
253 ; CHECK: stx %o0, [%i0]
254 ; CHECK: stx %o1, [%i0]
255 define void @call_ret_i64_pair(i64* %i0) {
256 %rv = call { i64, i64 } @ret_i64_pair(i32 undef, i32 undef,
257 i64* undef, i64* undef)
258 %e0 = extractvalue { i64, i64 } %rv, 0
259 store i64 %e0, i64* %i0
260 %e1 = extractvalue { i64, i64 } %rv, 1
261 store i64 %e1, i64* %i0
265 ; This is not a C struct, the i32 member uses 8 bytes, but the float only 4.
266 ; CHECK-LABEL: ret_i32_float_pair:
267 ; CHECK: ld [%i2], %i0
268 ; CHECK: ld [%i3], %f2
269 define { i32, float } @ret_i32_float_pair(i32 %a0, i32 %a1,
270 i32* %p, float* %q) {
271 %r1 = load i32, i32* %p
272 %rv1 = insertvalue { i32, float } undef, i32 %r1, 0
274 %r2 = load float, float* %q
275 %rv2 = insertvalue { i32, float } %rv1, float %r2, 1
276 ret { i32, float } %rv2
279 ; CHECK-LABEL: call_ret_i32_float_pair:
280 ; CHECK: call ret_i32_float_pair
281 ; CHECK: st %o0, [%i0]
282 ; CHECK: st %f2, [%i1]
283 define void @call_ret_i32_float_pair(i32* %i0, float* %i1) {
284 %rv = call { i32, float } @ret_i32_float_pair(i32 undef, i32 undef,
285 i32* undef, float* undef)
286 %e0 = extractvalue { i32, float } %rv, 0
287 store i32 %e0, i32* %i0
288 %e1 = extractvalue { i32, float } %rv, 1
289 store float %e1, float* %i1
293 ; This is a C struct, each member uses 4 bytes.
294 ; CHECK-LABEL: ret_i32_float_packed:
295 ; CHECK: ld [%i2], [[R:%[gilo][0-7]]]
296 ; CHECK: ld [%i3], %f1
297 ; CHECK: sllx [[R]], 32, %i0
298 define inreg { i32, float } @ret_i32_float_packed(i32 %a0, i32 %a1,
299 i32* %p, float* %q) {
300 %r1 = load i32, i32* %p
301 %rv1 = insertvalue { i32, float } undef, i32 %r1, 0
303 %r2 = load float, float* %q
304 %rv2 = insertvalue { i32, float } %rv1, float %r2, 1
305 ret { i32, float } %rv2
308 ; CHECK-LABEL: call_ret_i32_float_packed:
309 ; CHECK: call ret_i32_float_packed
310 ; CHECK: srlx %o0, 32, [[R:%[gilo][0-7]]]
311 ; CHECK: st [[R]], [%i0]
312 ; CHECK: st %f1, [%i1]
313 define void @call_ret_i32_float_packed(i32* %i0, float* %i1) {
314 %rv = call { i32, float } @ret_i32_float_packed(i32 undef, i32 undef,
315 i32* undef, float* undef)
316 %e0 = extractvalue { i32, float } %rv, 0
317 store i32 %e0, i32* %i0
318 %e1 = extractvalue { i32, float } %rv, 1
319 store float %e1, float* %i1
323 ; The C frontend should use i64 to return { i32, i32 } structs, but verify that
324 ; we don't miscompile thi case where both struct elements are placed in %i0.
325 ; CHECK-LABEL: ret_i32_packed:
326 ; CHECK: ld [%i2], [[R1:%[gilo][0-7]]]
327 ; CHECK: ld [%i3], [[R2:%[gilo][0-7]]]
328 ; CHECK: sllx [[R2]], 32, [[R3:%[gilo][0-7]]]
329 ; CHECK: or [[R3]], [[R1]], %i0
330 define inreg { i32, i32 } @ret_i32_packed(i32 %a0, i32 %a1,
332 %r1 = load i32, i32* %p
333 %rv1 = insertvalue { i32, i32 } undef, i32 %r1, 1
335 %r2 = load i32, i32* %q
336 %rv2 = insertvalue { i32, i32 } %rv1, i32 %r2, 0
337 ret { i32, i32 } %rv2
340 ; CHECK-LABEL: call_ret_i32_packed:
341 ; CHECK: call ret_i32_packed
342 ; CHECK: srlx %o0, 32, [[R:%[gilo][0-7]]]
343 ; CHECK: st [[R]], [%i0]
344 ; CHECK: st %o0, [%i1]
345 define void @call_ret_i32_packed(i32* %i0, i32* %i1) {
346 %rv = call { i32, i32 } @ret_i32_packed(i32 undef, i32 undef,
347 i32* undef, i32* undef)
348 %e0 = extractvalue { i32, i32 } %rv, 0
349 store i32 %e0, i32* %i0
350 %e1 = extractvalue { i32, i32 } %rv, 1
351 store i32 %e1, i32* %i1
355 ; The return value must be sign-extended to 64 bits.
356 ; CHECK-LABEL: ret_sext:
357 ; CHECK: sra %i0, 0, %i0
358 define signext i32 @ret_sext(i32 %a0) {
362 ; CHECK-LABEL: ret_zext:
363 ; CHECK: srl %i0, 0, %i0
364 define zeroext i32 @ret_zext(i32 %a0) {
368 ; CHECK-LABEL: ret_nosext:
370 define signext i32 @ret_nosext(i32 signext %a0) {
374 ; CHECK-LABEL: ret_nozext:
376 define signext i32 @ret_nozext(i32 signext %a0) {
380 ; CHECK-LABEL: test_register_directive:
381 ; CHECK: .register %g2, #scratch
382 ; CHECK: .register %g3, #scratch
383 ; CHECK: add %i0, 2, %g2
384 ; CHECK: add %i0, 3, %g3
385 define i32 @test_register_directive(i32 %i0) {
387 %0 = add nsw i32 %i0, 2
388 %1 = add nsw i32 %i0, 3
389 tail call void asm sideeffect "", "r,r,~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{o0},~{o1},~{o2},~{o3},~{o4},~{o5},~{o6},~{o7},~{g1},~{g4},~{g5},~{g6},~{g7}"(i32 %0, i32 %1)
390 %2 = add nsw i32 %0, %1
394 ; CHECK-LABEL: test_large_stack:
396 ; CHECK: sethi 16, %g1
397 ; CHECK: xor %g1, -176, %g1
398 ; CHECK: save %sp, %g1, %sp
400 ; CHECK: sethi 14, %g1
401 ; CHECK: xor %g1, -1, %g1
402 ; CHECK: add %g1, %fp, %g1
403 ; CHECK: call use_buf
405 define i32 @test_large_stack() {
407 %buffer1 = alloca [16384 x i8], align 8
408 %buffer1.sub = getelementptr inbounds [16384 x i8], [16384 x i8]* %buffer1, i32 0, i32 0
409 %0 = call i32 @use_buf(i32 16384, i8* %buffer1.sub)
413 declare i32 @use_buf(i32, i8*)
415 ; CHECK-LABEL: test_fp128_args:
416 ; CHECK-DAG: std %f0, [%fp+{{.+}}]
417 ; CHECK-DAG: std %f2, [%fp+{{.+}}]
418 ; CHECK-DAG: std %f6, [%fp+{{.+}}]
419 ; CHECK-DAG: std %f4, [%fp+{{.+}}]
420 ; CHECK: add %fp, [[Offset:[0-9]+]], %o0
421 ; CHECK: call _Qp_add
422 ; CHECK: ldd [%fp+[[Offset]]], %f0
423 define fp128 @test_fp128_args(fp128 %a, fp128 %b) {
425 %0 = fadd fp128 %a, %b
429 declare i64 @receive_fp128(i64 %a, ...)
431 ; CHECK-LABEL: test_fp128_variable_args:
432 ; CHECK-DAG: std %f4, [%sp+[[Offset0:[0-9]+]]]
433 ; CHECK-DAG: std %f6, [%sp+[[Offset1:[0-9]+]]]
434 ; CHECK-DAG: ldx [%sp+[[Offset0]]], %o2
435 ; CHECK-DAG: ldx [%sp+[[Offset1]]], %o3
436 ; CHECK: call receive_fp128
437 define i64 @test_fp128_variable_args(i64 %a, fp128 %b) {
439 %0 = call i64 (i64, ...) @receive_fp128(i64 %a, fp128 %b)
443 ; CHECK-LABEL: test_call_libfunc:
444 ; CHECK: st %f1, [%fp+[[Offset0:[0-9]+]]]
445 ; CHECK: fmovs %f3, %f1
447 ; CHECK: st %f0, [%fp+[[Offset1:[0-9]+]]]
448 ; CHECK: ld [%fp+[[Offset0]]], %f1
450 ; CHECK: ld [%fp+[[Offset1]]], %f1
451 ; CHECK: fmuls %f1, %f0, %f0
453 define inreg float @test_call_libfunc(float %arg0, float %arg1) {
455 %0 = tail call inreg float @cosf(float %arg1)
456 %1 = tail call inreg float @sinf(float %arg0)
457 %2 = fmul float %0, %1
461 declare inreg float @cosf(float %arg) readnone nounwind
462 declare inreg float @sinf(float %arg) readnone nounwind