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Add 32 bit and reg-imm and disable invalid patterns for now
[oota-llvm.git]
/
test
/
CodeGen
/
SystemZ
/
03-RetAndSubreg.ll
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; RUN: llvm-as < %s | llc -march=systemz | grep ngr | count 4
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define i32 @foo(i32 %a, i32 %b) {
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entry:
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%c = and i32 %a, %b
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ret i32 %c
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}
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define i32 @foo1(i32 %a, i32 %b) zeroext {
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entry:
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%c = and i32 %a, %b
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ret i32 %c
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}
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define i32 @foo2(i32 %a, i32 %b) signext {
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entry:
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%c = and i32 %a, %b
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ret i32 %c
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}
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