1 ; Test 64-bit atomic minimum and maximum.
3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
6 define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
8 ; CHECK: lg %r2, 0(%r3)
9 ; CHECK: [[LOOP:\.[^:]*]]:
10 ; CHECK: lgr [[NEW:%r[0-9]+]], %r2
11 ; CHECK: cgrjle %r2, %r4, [[KEEP:\..*]]
12 ; CHECK: lgr [[NEW]], %r4
13 ; CHECK: csg %r2, [[NEW]], 0(%r3)
16 %res = atomicrmw min i64 *%src, i64 %b seq_cst
20 ; Check signed maximum.
21 define i64 @f2(i64 %dummy, i64 *%src, i64 %b) {
23 ; CHECK: lg %r2, 0(%r3)
24 ; CHECK: [[LOOP:\.[^:]*]]:
25 ; CHECK: lgr [[NEW:%r[0-9]+]], %r2
26 ; CHECK: cgrjhe %r2, %r4, [[KEEP:\..*]]
27 ; CHECK: lgr [[NEW]], %r4
28 ; CHECK: csg %r2, [[NEW]], 0(%r3)
31 %res = atomicrmw max i64 *%src, i64 %b seq_cst
35 ; Check unsigned minimum.
36 define i64 @f3(i64 %dummy, i64 *%src, i64 %b) {
38 ; CHECK: lg %r2, 0(%r3)
39 ; CHECK: [[LOOP:\.[^:]*]]:
40 ; CHECK: clgr %r2, %r4
41 ; CHECK: lgr [[NEW:%r[0-9]+]], %r2
42 ; CHECK: jle [[KEEP:\..*]]
43 ; CHECK: lgr [[NEW]], %r4
44 ; CHECK: csg %r2, [[NEW]], 0(%r3)
47 %res = atomicrmw umin i64 *%src, i64 %b seq_cst
51 ; Check unsigned maximum.
52 define i64 @f4(i64 %dummy, i64 *%src, i64 %b) {
54 ; CHECK: lg %r2, 0(%r3)
55 ; CHECK: [[LOOP:\.[^:]*]]:
56 ; CHECK: clgr %r2, %r4
57 ; CHECK: lgr [[NEW:%r[0-9]+]], %r2
58 ; CHECK: jhe [[KEEP:\..*]]
59 ; CHECK: lgr [[NEW]], %r4
60 ; CHECK: csg %r2, [[NEW]], 0(%r3)
63 %res = atomicrmw umax i64 *%src, i64 %b seq_cst
67 ; Check the high end of the aligned CSG range.
68 define i64 @f5(i64 %dummy, i64 *%src, i64 %b) {
70 ; CHECK: lg %r2, 524280(%r3)
71 ; CHECK: csg %r2, {{%r[0-9]+}}, 524280(%r3)
73 %ptr = getelementptr i64 *%src, i64 65535
74 %res = atomicrmw min i64 *%ptr, i64 %b seq_cst
78 ; Check the next doubleword up, which requires separate address logic.
79 define i64 @f6(i64 %dummy, i64 *%src, i64 %b) {
81 ; CHECK: agfi %r3, 524288
82 ; CHECK: lg %r2, 0(%r3)
83 ; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3)
85 %ptr = getelementptr i64 *%src, i64 65536
86 %res = atomicrmw min i64 *%ptr, i64 %b seq_cst
90 ; Check the low end of the CSG range.
91 define i64 @f7(i64 %dummy, i64 *%src, i64 %b) {
93 ; CHECK: lg %r2, -524288(%r3)
94 ; CHECK: csg %r2, {{%r[0-9]+}}, -524288(%r3)
96 %ptr = getelementptr i64 *%src, i64 -65536
97 %res = atomicrmw min i64 *%ptr, i64 %b seq_cst
101 ; Check the next doubleword down, which requires separate address logic.
102 define i64 @f8(i64 %dummy, i64 *%src, i64 %b) {
104 ; CHECK: agfi %r3, -524296
105 ; CHECK: lg %r2, 0(%r3)
106 ; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3)
108 %ptr = getelementptr i64 *%src, i64 -65537
109 %res = atomicrmw min i64 *%ptr, i64 %b seq_cst
113 ; Check that indexed addresses are not allowed.
114 define i64 @f9(i64 %dummy, i64 %base, i64 %index, i64 %b) {
116 ; CHECK: agr %r3, %r4
117 ; CHECK: lg %r2, 0(%r3)
118 ; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3)
120 %add = add i64 %base, %index
121 %ptr = inttoptr i64 %add to i64 *
122 %res = atomicrmw min i64 *%ptr, i64 %b seq_cst
126 ; Check that constants are handled.
127 define i64 @f10(i64 %dummy, i64 *%ptr) {
129 ; CHECK: lghi [[LIMIT:%r[0-9]+]], 42
130 ; CHECK: lg %r2, 0(%r3)
131 ; CHECK: [[LOOP:\.[^:]*]]:
132 ; CHECK: lgr [[NEW:%r[0-9]+]], %r2
133 ; CHECK: cgrjle %r2, [[LIMIT]], [[KEEP:\..*]]
134 ; CHECK: lghi [[NEW]], 42
135 ; CHECK: csg %r2, [[NEW]], 0(%r3)
136 ; CHECK: jlh [[LOOP]]
138 %res = atomicrmw min i64 *%ptr, i64 42 seq_cst