1 ; Test 64-bit atomic minimum and maximum.
3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
6 define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
8 ; CHECK: lg %r2, 0(%r3)
9 ; CHECK: [[LOOP:\.[^:]*]]:
11 ; CHECK: lgr [[NEW:%r[0-9]+]], %r2
12 ; CHECK: jle [[KEEP:\..*]]
13 ; CHECK: lgr [[NEW]], %r4
14 ; CHECK: csg %r2, [[NEW]], 0(%r3)
17 %res = atomicrmw min i64 *%src, i64 %b seq_cst
21 ; Check signed maximum.
22 define i64 @f2(i64 %dummy, i64 *%src, i64 %b) {
24 ; CHECK: lg %r2, 0(%r3)
25 ; CHECK: [[LOOP:\.[^:]*]]:
27 ; CHECK: lgr [[NEW:%r[0-9]+]], %r2
28 ; CHECK: jhe [[KEEP:\..*]]
29 ; CHECK: lgr [[NEW]], %r4
30 ; CHECK: csg %r2, [[NEW]], 0(%r3)
33 %res = atomicrmw max i64 *%src, i64 %b seq_cst
37 ; Check unsigned minimum.
38 define i64 @f3(i64 %dummy, i64 *%src, i64 %b) {
40 ; CHECK: lg %r2, 0(%r3)
41 ; CHECK: [[LOOP:\.[^:]*]]:
42 ; CHECK: clgr %r2, %r4
43 ; CHECK: lgr [[NEW:%r[0-9]+]], %r2
44 ; CHECK: jle [[KEEP:\..*]]
45 ; CHECK: lgr [[NEW]], %r4
46 ; CHECK: csg %r2, [[NEW]], 0(%r3)
49 %res = atomicrmw umin i64 *%src, i64 %b seq_cst
53 ; Check unsigned maximum.
54 define i64 @f4(i64 %dummy, i64 *%src, i64 %b) {
56 ; CHECK: lg %r2, 0(%r3)
57 ; CHECK: [[LOOP:\.[^:]*]]:
58 ; CHECK: clgr %r2, %r4
59 ; CHECK: lgr [[NEW:%r[0-9]+]], %r2
60 ; CHECK: jhe [[KEEP:\..*]]
61 ; CHECK: lgr [[NEW]], %r4
62 ; CHECK: csg %r2, [[NEW]], 0(%r3)
65 %res = atomicrmw umax i64 *%src, i64 %b seq_cst
69 ; Check the high end of the aligned CSG range.
70 define i64 @f5(i64 %dummy, i64 *%src, i64 %b) {
72 ; CHECK: lg %r2, 524280(%r3)
73 ; CHECK: csg %r2, {{%r[0-9]+}}, 524280(%r3)
75 %ptr = getelementptr i64 *%src, i64 65535
76 %res = atomicrmw min i64 *%ptr, i64 %b seq_cst
80 ; Check the next doubleword up, which requires separate address logic.
81 define i64 @f6(i64 %dummy, i64 *%src, i64 %b) {
83 ; CHECK: agfi %r3, 524288
84 ; CHECK: lg %r2, 0(%r3)
85 ; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3)
87 %ptr = getelementptr i64 *%src, i64 65536
88 %res = atomicrmw min i64 *%ptr, i64 %b seq_cst
92 ; Check the low end of the CSG range.
93 define i64 @f7(i64 %dummy, i64 *%src, i64 %b) {
95 ; CHECK: lg %r2, -524288(%r3)
96 ; CHECK: csg %r2, {{%r[0-9]+}}, -524288(%r3)
98 %ptr = getelementptr i64 *%src, i64 -65536
99 %res = atomicrmw min i64 *%ptr, i64 %b seq_cst
103 ; Check the next doubleword down, which requires separate address logic.
104 define i64 @f8(i64 %dummy, i64 *%src, i64 %b) {
106 ; CHECK: agfi %r3, -524296
107 ; CHECK: lg %r2, 0(%r3)
108 ; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3)
110 %ptr = getelementptr i64 *%src, i64 -65537
111 %res = atomicrmw min i64 *%ptr, i64 %b seq_cst
115 ; Check that indexed addresses are not allowed.
116 define i64 @f9(i64 %dummy, i64 %base, i64 %index, i64 %b) {
118 ; CHECK: agr %r3, %r4
119 ; CHECK: lg %r2, 0(%r3)
120 ; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3)
122 %add = add i64 %base, %index
123 %ptr = inttoptr i64 %add to i64 *
124 %res = atomicrmw min i64 *%ptr, i64 %b seq_cst
128 ; Check that constants are forced into a register.
129 define i64 @f10(i64 %dummy, i64 *%ptr) {
131 ; CHECK: lghi [[LIMIT:%r[0-9]+]], 42
132 ; CHECK: lg %r2, 0(%r3)
133 ; CHECK: [[LOOP:\.[^:]*]]:
134 ; CHECK: cgr %r2, [[LIMIT]]
135 ; CHECK: lgr [[NEW:%r[0-9]+]], %r2
136 ; CHECK: jle [[KEEP:\..*]]
137 ; CHECK: lgr [[NEW]], [[LIMIT]]
138 ; CHECK: csg %r2, [[NEW]], 0(%r3)
139 ; CHECK: jlh [[LOOP]]
141 %res = atomicrmw min i64 *%ptr, i64 42 seq_cst