1 ; Test 32-bit atomic exchange.
3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
5 ; Check register exchange.
6 define i32 @f1(i32 %dummy, i32 *%src, i32 %b) {
9 ; CHECK: [[LABEL:\.[^:]*]]:
10 ; CHECK: cs %r2, %r4, 0(%r3)
13 %res = atomicrmw xchg i32 *%src, i32 %b seq_cst
17 ; Check the high end of the aligned CS range.
18 define i32 @f2(i32 %dummy, i32 *%src, i32 %b) {
20 ; CHECK: l %r2, 4092(%r3)
21 ; CHECK: cs %r2, {{%r[0-9]+}}, 4092(%r3)
23 %ptr = getelementptr i32 *%src, i64 1023
24 %res = atomicrmw xchg i32 *%ptr, i32 %b seq_cst
28 ; Check the next word up, which requires CSY.
29 define i32 @f3(i32 %dummy, i32 *%src, i32 %b) {
31 ; CHECK: ly %r2, 4096(%r3)
32 ; CHECK: csy %r2, {{%r[0-9]+}}, 4096(%r3)
34 %ptr = getelementptr i32 *%src, i64 1024
35 %res = atomicrmw xchg i32 *%ptr, i32 %b seq_cst
39 ; Check the high end of the aligned CSY range.
40 define i32 @f4(i32 %dummy, i32 *%src, i32 %b) {
42 ; CHECK: ly %r2, 524284(%r3)
43 ; CHECK: csy %r2, {{%r[0-9]+}}, 524284(%r3)
45 %ptr = getelementptr i32 *%src, i64 131071
46 %res = atomicrmw xchg i32 *%ptr, i32 %b seq_cst
50 ; Check the next word up, which needs separate address logic.
51 define i32 @f5(i32 %dummy, i32 *%src, i32 %b) {
53 ; CHECK: agfi %r3, 524288
54 ; CHECK: l %r2, 0(%r3)
55 ; CHECK: cs %r2, {{%r[0-9]+}}, 0(%r3)
57 %ptr = getelementptr i32 *%src, i64 131072
58 %res = atomicrmw xchg i32 *%ptr, i32 %b seq_cst
62 ; Check the high end of the negative aligned CSY range.
63 define i32 @f6(i32 %dummy, i32 *%src, i32 %b) {
65 ; CHECK: ly %r2, -4(%r3)
66 ; CHECK: csy %r2, {{%r[0-9]+}}, -4(%r3)
68 %ptr = getelementptr i32 *%src, i64 -1
69 %res = atomicrmw xchg i32 *%ptr, i32 %b seq_cst
73 ; Check the low end of the CSY range.
74 define i32 @f7(i32 %dummy, i32 *%src, i32 %b) {
76 ; CHECK: ly %r2, -524288(%r3)
77 ; CHECK: csy %r2, {{%r[0-9]+}}, -524288(%r3)
79 %ptr = getelementptr i32 *%src, i64 -131072
80 %res = atomicrmw xchg i32 *%ptr, i32 %b seq_cst
84 ; Check the next word down, which needs separate address logic.
85 define i32 @f8(i32 %dummy, i32 *%src, i32 %b) {
87 ; CHECK: agfi %r3, -524292
88 ; CHECK: l %r2, 0(%r3)
89 ; CHECK: cs %r2, {{%r[0-9]+}}, 0(%r3)
91 %ptr = getelementptr i32 *%src, i64 -131073
92 %res = atomicrmw xchg i32 *%ptr, i32 %b seq_cst
96 ; Check that indexed addresses are not allowed.
97 define i32 @f9(i32 %dummy, i64 %base, i64 %index, i32 %b) {
100 ; CHECK: l %r2, 0(%r3)
101 ; CHECK: cs %r2, {{%r[0-9]+}}, 0(%r3)
103 %add = add i64 %base, %index
104 %ptr = inttoptr i64 %add to i32 *
105 %res = atomicrmw xchg i32 *%ptr, i32 %b seq_cst
109 ; Check exchange of a constant. We should force it into a register and
110 ; use the sequence above.
111 define i32 @f10(i32 %dummy, i32 *%src) {
113 ; CHECK: llill [[VALUE:%r[0-9+]]], 40000
114 ; CHECK: l %r2, 0(%r3)
115 ; CHECK: [[LABEL:\.[^:]*]]:
116 ; CHECK: cs %r2, [[VALUE]], 0(%r3)
117 ; CHECK: jl [[LABEL]]
119 %res = atomicrmw xchg i32 *%src, i32 40000 seq_cst