1 ; Test 32-bit atomic ORs, z196 version.
3 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
5 ; Check OR of a variable.
6 define i32 @f1(i32 %dummy, i32 *%src, i32 %b) {
8 ; CHECK: lax %r2, %r4, 0(%r3)
10 %res = atomicrmw xor i32 *%src, i32 %b seq_cst
14 ; Check OR of 1, which needs a temporary.
15 define i32 @f2(i32 %dummy, i32 *%src) {
17 ; CHECK: lhi [[TMP:%r[0-5]]], 1
18 ; CHECK: lax %r2, [[TMP]], 0(%r3)
20 %res = atomicrmw xor i32 *%src, i32 1 seq_cst
24 ; Check the high end of the LAX range.
25 define i32 @f3(i32 %dummy, i32 *%src, i32 %b) {
27 ; CHECK: lax %r2, %r4, 524284(%r3)
29 %ptr = getelementptr i32 *%src, i32 131071
30 %res = atomicrmw xor i32 *%ptr, i32 %b seq_cst
34 ; Check the next word up, which needs separate address logic.
35 define i32 @f4(i32 %dummy, i32 *%src, i32 %b) {
37 ; CHECK: agfi %r3, 524288
38 ; CHECK: lax %r2, %r4, 0(%r3)
40 %ptr = getelementptr i32 *%src, i32 131072
41 %res = atomicrmw xor i32 *%ptr, i32 %b seq_cst
45 ; Check the low end of the LAX range.
46 define i32 @f5(i32 %dummy, i32 *%src, i32 %b) {
48 ; CHECK: lax %r2, %r4, -524288(%r3)
50 %ptr = getelementptr i32 *%src, i32 -131072
51 %res = atomicrmw xor i32 *%ptr, i32 %b seq_cst
55 ; Check the next word down, which needs separate address logic.
56 define i32 @f6(i32 %dummy, i32 *%src, i32 %b) {
58 ; CHECK: agfi %r3, -524292
59 ; CHECK: lax %r2, %r4, 0(%r3)
61 %ptr = getelementptr i32 *%src, i32 -131073
62 %res = atomicrmw xor i32 *%ptr, i32 %b seq_cst