1 ; Test 32-bit floating-point comparison.
3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
5 ; Check comparison with registers.
6 define i64 @f1(i64 %a, i64 %b, float %f1, float %f2) {
12 %cond = fcmp oeq float %f1, %f2
13 %res = select i1 %cond, i64 %a, i64 %b
17 ; Check the low end of the CEB range.
18 define i64 @f2(i64 %a, i64 %b, float %f1, float *%ptr) {
20 ; CHECK: ceb %f0, 0(%r4)
21 ; CHECK-NEXT: j{{g?}}e
24 %f2 = load float *%ptr
25 %cond = fcmp oeq float %f1, %f2
26 %res = select i1 %cond, i64 %a, i64 %b
30 ; Check the high end of the aligned CEB range.
31 define i64 @f3(i64 %a, i64 %b, float %f1, float *%base) {
33 ; CHECK: ceb %f0, 4092(%r4)
34 ; CHECK-NEXT: j{{g?}}e
37 %ptr = getelementptr float *%base, i64 1023
38 %f2 = load float *%ptr
39 %cond = fcmp oeq float %f1, %f2
40 %res = select i1 %cond, i64 %a, i64 %b
44 ; Check the next word up, which needs separate address logic.
45 ; Other sequences besides this one would be OK.
46 define i64 @f4(i64 %a, i64 %b, float %f1, float *%base) {
48 ; CHECK: aghi %r4, 4096
49 ; CHECK: ceb %f0, 0(%r4)
50 ; CHECK-NEXT: j{{g?}}e
53 %ptr = getelementptr float *%base, i64 1024
54 %f2 = load float *%ptr
55 %cond = fcmp oeq float %f1, %f2
56 %res = select i1 %cond, i64 %a, i64 %b
60 ; Check negative displacements, which also need separate address logic.
61 define i64 @f5(i64 %a, i64 %b, float %f1, float *%base) {
64 ; CHECK: ceb %f0, 0(%r4)
65 ; CHECK-NEXT: j{{g?}}e
68 %ptr = getelementptr float *%base, i64 -1
69 %f2 = load float *%ptr
70 %cond = fcmp oeq float %f1, %f2
71 %res = select i1 %cond, i64 %a, i64 %b
75 ; Check that CEB allows indices.
76 define i64 @f6(i64 %a, i64 %b, float %f1, float *%base, i64 %index) {
78 ; CHECK: sllg %r1, %r5, 2
79 ; CHECK: ceb %f0, 400(%r1,%r4)
80 ; CHECK-NEXT: j{{g?}}e
83 %ptr1 = getelementptr float *%base, i64 %index
84 %ptr2 = getelementptr float *%ptr1, i64 100
85 %f2 = load float *%ptr2
86 %cond = fcmp oeq float %f1, %f2
87 %res = select i1 %cond, i64 %a, i64 %b