1 ; Test 64-bit floating-point comparison.
3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
5 ; Check comparison with registers.
6 define i64 @f1(i64 %a, i64 %b, double %f1, double %f2) {
12 %cond = fcmp oeq double %f1, %f2
13 %res = select i1 %cond, i64 %a, i64 %b
17 ; Check the low end of the CDB range.
18 define i64 @f2(i64 %a, i64 %b, double %f1, double *%ptr) {
20 ; CHECK: cdb %f0, 0(%r4)
24 %f2 = load double *%ptr
25 %cond = fcmp oeq double %f1, %f2
26 %res = select i1 %cond, i64 %a, i64 %b
30 ; Check the high end of the aligned CDB range.
31 define i64 @f3(i64 %a, i64 %b, double %f1, double *%base) {
33 ; CHECK: cdb %f0, 4088(%r4)
37 %ptr = getelementptr double *%base, i64 511
38 %f2 = load double *%ptr
39 %cond = fcmp oeq double %f1, %f2
40 %res = select i1 %cond, i64 %a, i64 %b
44 ; Check the next doubleword up, which needs separate address logic.
45 ; Other sequences besides this one would be OK.
46 define i64 @f4(i64 %a, i64 %b, double %f1, double *%base) {
48 ; CHECK: aghi %r4, 4096
49 ; CHECK: cdb %f0, 0(%r4)
53 %ptr = getelementptr double *%base, i64 512
54 %f2 = load double *%ptr
55 %cond = fcmp oeq double %f1, %f2
56 %res = select i1 %cond, i64 %a, i64 %b
60 ; Check negative displacements, which also need separate address logic.
61 define i64 @f5(i64 %a, i64 %b, double %f1, double *%base) {
64 ; CHECK: cdb %f0, 0(%r4)
68 %ptr = getelementptr double *%base, i64 -1
69 %f2 = load double *%ptr
70 %cond = fcmp oeq double %f1, %f2
71 %res = select i1 %cond, i64 %a, i64 %b
75 ; Check that CDB allows indices.
76 define i64 @f6(i64 %a, i64 %b, double %f1, double *%base, i64 %index) {
78 ; CHECK: sllg %r1, %r5, 3
79 ; CHECK: cdb %f0, 800(%r1,%r4)
83 %ptr1 = getelementptr double *%base, i64 %index
84 %ptr2 = getelementptr double *%ptr1, i64 100
85 %f2 = load double *%ptr2
86 %cond = fcmp oeq double %f1, %f2
87 %res = select i1 %cond, i64 %a, i64 %b