1 ; Test 64-bit comparison in which the second operand is a zero-extended i32.
3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
5 ; Check unsigned register comparison.
6 define double @f1(double %a, double %b, i64 %i1, i32 %unext) {
8 ; CHECK: clgfr %r2, %r3
12 %i2 = zext i32 %unext to i64
13 %cond = icmp ult i64 %i1, %i2
14 %res = select i1 %cond, double %a, double %b
18 ; ...and again with a different representation.
19 define double @f2(double %a, double %b, i64 %i1, i64 %unext) {
21 ; CHECK: clgfr %r2, %r3
25 %i2 = and i64 %unext, 4294967295
26 %cond = icmp ult i64 %i1, %i2
27 %res = select i1 %cond, double %a, double %b
31 ; Check signed register comparison, which can't use CLGFR.
32 define double @f3(double %a, double %b, i64 %i1, i32 %unext) {
36 %i2 = zext i32 %unext to i64
37 %cond = icmp slt i64 %i1, %i2
38 %res = select i1 %cond, double %a, double %b
42 ; ...and again with a different representation
43 define double @f4(double %a, double %b, i64 %i1, i64 %unext) {
47 %i2 = and i64 %unext, 4294967295
48 %cond = icmp slt i64 %i1, %i2
49 %res = select i1 %cond, double %a, double %b
53 ; Check register equality.
54 define double @f5(double %a, double %b, i64 %i1, i32 %unext) {
56 ; CHECK: clgfr %r2, %r3
60 %i2 = zext i32 %unext to i64
61 %cond = icmp eq i64 %i1, %i2
62 %res = select i1 %cond, double %a, double %b
66 ; ...and again with a different representation
67 define double @f6(double %a, double %b, i64 %i1, i64 %unext) {
69 ; CHECK: clgfr %r2, %r3
73 %i2 = and i64 %unext, 4294967295
74 %cond = icmp eq i64 %i1, %i2
75 %res = select i1 %cond, double %a, double %b
79 ; Check register inequality.
80 define double @f7(double %a, double %b, i64 %i1, i32 %unext) {
82 ; CHECK: clgfr %r2, %r3
86 %i2 = zext i32 %unext to i64
87 %cond = icmp ne i64 %i1, %i2
88 %res = select i1 %cond, double %a, double %b
92 ; ...and again with a different representation
93 define double @f8(double %a, double %b, i64 %i1, i64 %unext) {
95 ; CHECK: clgfr %r2, %r3
99 %i2 = and i64 %unext, 4294967295
100 %cond = icmp ne i64 %i1, %i2
101 %res = select i1 %cond, double %a, double %b
105 ; Check unsigned comparisonn with memory.
106 define double @f9(double %a, double %b, i64 %i1, i32 *%ptr) {
108 ; CHECK: clgf %r2, 0(%r3)
110 ; CHECK: ldr %f0, %f2
112 %unext = load i32 *%ptr
113 %i2 = zext i32 %unext to i64
114 %cond = icmp ult i64 %i1, %i2
115 %res = select i1 %cond, double %a, double %b
119 ; Check signed comparison with memory.
120 define double @f10(double %a, double %b, i64 %i1, i32 *%ptr) {
124 %unext = load i32 *%ptr
125 %i2 = zext i32 %unext to i64
126 %cond = icmp slt i64 %i1, %i2
127 %res = select i1 %cond, double %a, double %b
131 ; Check memory equality.
132 define double @f11(double %a, double %b, i64 %i1, i32 *%ptr) {
134 ; CHECK: clgf %r2, 0(%r3)
136 ; CHECK: ldr %f0, %f2
138 %unext = load i32 *%ptr
139 %i2 = zext i32 %unext to i64
140 %cond = icmp eq i64 %i1, %i2
141 %res = select i1 %cond, double %a, double %b
145 ; Check memory inequality.
146 define double @f12(double %a, double %b, i64 %i1, i32 *%ptr) {
148 ; CHECK: clgf %r2, 0(%r3)
150 ; CHECK: ldr %f0, %f2
152 %unext = load i32 *%ptr
153 %i2 = zext i32 %unext to i64
154 %cond = icmp ne i64 %i1, %i2
155 %res = select i1 %cond, double %a, double %b
159 ; Check the high end of the aligned CLGF range.
160 define double @f13(double %a, double %b, i64 %i1, i32 *%base) {
162 ; CHECK: clgf %r2, 524284(%r3)
164 ; CHECK: ldr %f0, %f2
166 %ptr = getelementptr i32 *%base, i64 131071
167 %unext = load i32 *%ptr
168 %i2 = zext i32 %unext to i64
169 %cond = icmp ult i64 %i1, %i2
170 %res = select i1 %cond, double %a, double %b
174 ; Check the next word up, which needs separate address logic.
175 ; Other sequences besides this one would be OK.
176 define double @f14(double %a, double %b, i64 %i1, i32 *%base) {
178 ; CHECK: agfi %r3, 524288
179 ; CHECK: clgf %r2, 0(%r3)
181 ; CHECK: ldr %f0, %f2
183 %ptr = getelementptr i32 *%base, i64 131072
184 %unext = load i32 *%ptr
185 %i2 = zext i32 %unext to i64
186 %cond = icmp ult i64 %i1, %i2
187 %res = select i1 %cond, double %a, double %b
191 ; Check the high end of the negative aligned CLGF range.
192 define double @f15(double %a, double %b, i64 %i1, i32 *%base) {
194 ; CHECK: clgf %r2, -4(%r3)
196 ; CHECK: ldr %f0, %f2
198 %ptr = getelementptr i32 *%base, i64 -1
199 %unext = load i32 *%ptr
200 %i2 = zext i32 %unext to i64
201 %cond = icmp ult i64 %i1, %i2
202 %res = select i1 %cond, double %a, double %b
206 ; Check the low end of the CLGF range.
207 define double @f16(double %a, double %b, i64 %i1, i32 *%base) {
209 ; CHECK: clgf %r2, -524288(%r3)
211 ; CHECK: ldr %f0, %f2
213 %ptr = getelementptr i32 *%base, i64 -131072
214 %unext = load i32 *%ptr
215 %i2 = zext i32 %unext to i64
216 %cond = icmp ult i64 %i1, %i2
217 %res = select i1 %cond, double %a, double %b
221 ; Check the next word down, which needs separate address logic.
222 ; Other sequences besides this one would be OK.
223 define double @f17(double %a, double %b, i64 %i1, i32 *%base) {
225 ; CHECK: agfi %r3, -524292
226 ; CHECK: clgf %r2, 0(%r3)
228 ; CHECK: ldr %f0, %f2
230 %ptr = getelementptr i32 *%base, i64 -131073
231 %unext = load i32 *%ptr
232 %i2 = zext i32 %unext to i64
233 %cond = icmp ult i64 %i1, %i2
234 %res = select i1 %cond, double %a, double %b
238 ; Check that CLGF allows an index.
239 define double @f18(double %a, double %b, i64 %i1, i64 %base, i64 %index) {
241 ; CHECK: clgf %r2, 524284({{%r4,%r3|%r3,%r4}})
243 ; CHECK: ldr %f0, %f2
245 %add1 = add i64 %base, %index
246 %add2 = add i64 %add1, 524284
247 %ptr = inttoptr i64 %add2 to i32 *
248 %unext = load i32 *%ptr
249 %i2 = zext i32 %unext to i64
250 %cond = icmp ult i64 %i1, %i2
251 %res = select i1 %cond, double %a, double %b