1 ; Test zero extensions from a halfword to an i64.
3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
5 ; Test register extension, starting with an i32.
6 define i64 @f1(i32 %a) {
8 ; CHECK: llghr %r2, %r2
10 %half = trunc i32 %a to i16
11 %ext = zext i16 %half to i64
15 ; ...and again with an i64.
16 define i64 @f2(i64 %a) {
18 ; CHECK: llghr %r2, %r2
20 %half = trunc i64 %a to i16
21 %ext = zext i16 %half to i64
25 ; Check ANDs that are equivalent to zero extension.
26 define i64 @f3(i64 %a) {
28 ; CHECK: llghr %r2, %r2
30 %ext = and i64 %a, 65535
34 ; Check LLGH with no displacement.
35 define i64 @f4(i16 *%src) {
37 ; CHECK: llgh %r2, 0(%r2)
39 %half = load i16 *%src
40 %ext = zext i16 %half to i64
44 ; Check the high end of the LLGH range.
45 define i64 @f5(i16 *%src) {
47 ; CHECK: llgh %r2, 524286(%r2)
49 %ptr = getelementptr i16 *%src, i64 262143
50 %half = load i16 *%ptr
51 %ext = zext i16 %half to i64
55 ; Check the next halfword up, which needs separate address logic.
56 ; Other sequences besides this one would be OK.
57 define i64 @f6(i16 *%src) {
59 ; CHECK: agfi %r2, 524288
60 ; CHECK: llgh %r2, 0(%r2)
62 %ptr = getelementptr i16 *%src, i64 262144
63 %half = load i16 *%ptr
64 %ext = zext i16 %half to i64
68 ; Check the high end of the negative LLGH range.
69 define i64 @f7(i16 *%src) {
71 ; CHECK: llgh %r2, -2(%r2)
73 %ptr = getelementptr i16 *%src, i64 -1
74 %half = load i16 *%ptr
75 %ext = zext i16 %half to i64
79 ; Check the low end of the LLGH range.
80 define i64 @f8(i16 *%src) {
82 ; CHECK: llgh %r2, -524288(%r2)
84 %ptr = getelementptr i16 *%src, i64 -262144
85 %half = load i16 *%ptr
86 %ext = zext i16 %half to i64
90 ; Check the next halfword down, which needs separate address logic.
91 ; Other sequences besides this one would be OK.
92 define i64 @f9(i16 *%src) {
94 ; CHECK: agfi %r2, -524290
95 ; CHECK: llgh %r2, 0(%r2)
97 %ptr = getelementptr i16 *%src, i64 -262145
98 %half = load i16 *%ptr
99 %ext = zext i16 %half to i64
103 ; Check that LLGH allows an index
104 define i64 @f10(i64 %src, i64 %index) {
106 ; CHECK: llgh %r2, 524287(%r3,%r2)
108 %add1 = add i64 %src, %index
109 %add2 = add i64 %add1, 524287
110 %ptr = inttoptr i64 %add2 to i16 *
111 %half = load i16 *%ptr
112 %ext = zext i16 %half to i64