1 ; Test vector intrinsics.
3 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
5 declare i32 @llvm.s390.lcbb(i8 *, i32)
6 declare <16 x i8> @llvm.s390.vlbb(i8 *, i32)
7 declare <16 x i8> @llvm.s390.vll(i32, i8 *)
8 declare <2 x i64> @llvm.s390.vpdi(<2 x i64>, <2 x i64>, i32)
9 declare <16 x i8> @llvm.s390.vperm(<16 x i8>, <16 x i8>, <16 x i8>)
10 declare <16 x i8> @llvm.s390.vpksh(<8 x i16>, <8 x i16>)
11 declare <8 x i16> @llvm.s390.vpksf(<4 x i32>, <4 x i32>)
12 declare <4 x i32> @llvm.s390.vpksg(<2 x i64>, <2 x i64>)
13 declare {<16 x i8>, i32} @llvm.s390.vpkshs(<8 x i16>, <8 x i16>)
14 declare {<8 x i16>, i32} @llvm.s390.vpksfs(<4 x i32>, <4 x i32>)
15 declare {<4 x i32>, i32} @llvm.s390.vpksgs(<2 x i64>, <2 x i64>)
16 declare <16 x i8> @llvm.s390.vpklsh(<8 x i16>, <8 x i16>)
17 declare <8 x i16> @llvm.s390.vpklsf(<4 x i32>, <4 x i32>)
18 declare <4 x i32> @llvm.s390.vpklsg(<2 x i64>, <2 x i64>)
19 declare {<16 x i8>, i32} @llvm.s390.vpklshs(<8 x i16>, <8 x i16>)
20 declare {<8 x i16>, i32} @llvm.s390.vpklsfs(<4 x i32>, <4 x i32>)
21 declare {<4 x i32>, i32} @llvm.s390.vpklsgs(<2 x i64>, <2 x i64>)
22 declare void @llvm.s390.vstl(<16 x i8>, i32, i8 *)
23 declare <8 x i16> @llvm.s390.vuphb(<16 x i8>)
24 declare <4 x i32> @llvm.s390.vuphh(<8 x i16>)
25 declare <2 x i64> @llvm.s390.vuphf(<4 x i32>)
26 declare <8 x i16> @llvm.s390.vuplhb(<16 x i8>)
27 declare <4 x i32> @llvm.s390.vuplhh(<8 x i16>)
28 declare <2 x i64> @llvm.s390.vuplhf(<4 x i32>)
29 declare <8 x i16> @llvm.s390.vuplb(<16 x i8>)
30 declare <4 x i32> @llvm.s390.vuplhw(<8 x i16>)
31 declare <2 x i64> @llvm.s390.vuplf(<4 x i32>)
32 declare <8 x i16> @llvm.s390.vupllb(<16 x i8>)
33 declare <4 x i32> @llvm.s390.vupllh(<8 x i16>)
34 declare <2 x i64> @llvm.s390.vupllf(<4 x i32>)
35 declare <16 x i8> @llvm.s390.vaccb(<16 x i8>, <16 x i8>)
36 declare <8 x i16> @llvm.s390.vacch(<8 x i16>, <8 x i16>)
37 declare <4 x i32> @llvm.s390.vaccf(<4 x i32>, <4 x i32>)
38 declare <2 x i64> @llvm.s390.vaccg(<2 x i64>, <2 x i64>)
39 declare <16 x i8> @llvm.s390.vaq(<16 x i8>, <16 x i8>)
40 declare <16 x i8> @llvm.s390.vacq(<16 x i8>, <16 x i8>, <16 x i8>)
41 declare <16 x i8> @llvm.s390.vaccq(<16 x i8>, <16 x i8>)
42 declare <16 x i8> @llvm.s390.vacccq(<16 x i8>, <16 x i8>, <16 x i8>)
43 declare <16 x i8> @llvm.s390.vavgb(<16 x i8>, <16 x i8>)
44 declare <8 x i16> @llvm.s390.vavgh(<8 x i16>, <8 x i16>)
45 declare <4 x i32> @llvm.s390.vavgf(<4 x i32>, <4 x i32>)
46 declare <2 x i64> @llvm.s390.vavgg(<2 x i64>, <2 x i64>)
47 declare <16 x i8> @llvm.s390.vavglb(<16 x i8>, <16 x i8>)
48 declare <8 x i16> @llvm.s390.vavglh(<8 x i16>, <8 x i16>)
49 declare <4 x i32> @llvm.s390.vavglf(<4 x i32>, <4 x i32>)
50 declare <2 x i64> @llvm.s390.vavglg(<2 x i64>, <2 x i64>)
51 declare <4 x i32> @llvm.s390.vcksm(<4 x i32>, <4 x i32>)
52 declare <8 x i16> @llvm.s390.vgfmb(<16 x i8>, <16 x i8>)
53 declare <4 x i32> @llvm.s390.vgfmh(<8 x i16>, <8 x i16>)
54 declare <2 x i64> @llvm.s390.vgfmf(<4 x i32>, <4 x i32>)
55 declare <16 x i8> @llvm.s390.vgfmg(<2 x i64>, <2 x i64>)
56 declare <8 x i16> @llvm.s390.vgfmab(<16 x i8>, <16 x i8>, <8 x i16>)
57 declare <4 x i32> @llvm.s390.vgfmah(<8 x i16>, <8 x i16>, <4 x i32>)
58 declare <2 x i64> @llvm.s390.vgfmaf(<4 x i32>, <4 x i32>, <2 x i64>)
59 declare <16 x i8> @llvm.s390.vgfmag(<2 x i64>, <2 x i64>, <16 x i8>)
60 declare <16 x i8> @llvm.s390.vmahb(<16 x i8>, <16 x i8>, <16 x i8>)
61 declare <8 x i16> @llvm.s390.vmahh(<8 x i16>, <8 x i16>, <8 x i16>)
62 declare <4 x i32> @llvm.s390.vmahf(<4 x i32>, <4 x i32>, <4 x i32>)
63 declare <16 x i8> @llvm.s390.vmalhb(<16 x i8>, <16 x i8>, <16 x i8>)
64 declare <8 x i16> @llvm.s390.vmalhh(<8 x i16>, <8 x i16>, <8 x i16>)
65 declare <4 x i32> @llvm.s390.vmalhf(<4 x i32>, <4 x i32>, <4 x i32>)
66 declare <8 x i16> @llvm.s390.vmaeb(<16 x i8>, <16 x i8>, <8 x i16>)
67 declare <4 x i32> @llvm.s390.vmaeh(<8 x i16>, <8 x i16>, <4 x i32>)
68 declare <2 x i64> @llvm.s390.vmaef(<4 x i32>, <4 x i32>, <2 x i64>)
69 declare <8 x i16> @llvm.s390.vmaleb(<16 x i8>, <16 x i8>, <8 x i16>)
70 declare <4 x i32> @llvm.s390.vmaleh(<8 x i16>, <8 x i16>, <4 x i32>)
71 declare <2 x i64> @llvm.s390.vmalef(<4 x i32>, <4 x i32>, <2 x i64>)
72 declare <8 x i16> @llvm.s390.vmaob(<16 x i8>, <16 x i8>, <8 x i16>)
73 declare <4 x i32> @llvm.s390.vmaoh(<8 x i16>, <8 x i16>, <4 x i32>)
74 declare <2 x i64> @llvm.s390.vmaof(<4 x i32>, <4 x i32>, <2 x i64>)
75 declare <8 x i16> @llvm.s390.vmalob(<16 x i8>, <16 x i8>, <8 x i16>)
76 declare <4 x i32> @llvm.s390.vmaloh(<8 x i16>, <8 x i16>, <4 x i32>)
77 declare <2 x i64> @llvm.s390.vmalof(<4 x i32>, <4 x i32>, <2 x i64>)
78 declare <16 x i8> @llvm.s390.vmhb(<16 x i8>, <16 x i8>)
79 declare <8 x i16> @llvm.s390.vmhh(<8 x i16>, <8 x i16>)
80 declare <4 x i32> @llvm.s390.vmhf(<4 x i32>, <4 x i32>)
81 declare <16 x i8> @llvm.s390.vmlhb(<16 x i8>, <16 x i8>)
82 declare <8 x i16> @llvm.s390.vmlhh(<8 x i16>, <8 x i16>)
83 declare <4 x i32> @llvm.s390.vmlhf(<4 x i32>, <4 x i32>)
84 declare <8 x i16> @llvm.s390.vmeb(<16 x i8>, <16 x i8>)
85 declare <4 x i32> @llvm.s390.vmeh(<8 x i16>, <8 x i16>)
86 declare <2 x i64> @llvm.s390.vmef(<4 x i32>, <4 x i32>)
87 declare <8 x i16> @llvm.s390.vmleb(<16 x i8>, <16 x i8>)
88 declare <4 x i32> @llvm.s390.vmleh(<8 x i16>, <8 x i16>)
89 declare <2 x i64> @llvm.s390.vmlef(<4 x i32>, <4 x i32>)
90 declare <8 x i16> @llvm.s390.vmob(<16 x i8>, <16 x i8>)
91 declare <4 x i32> @llvm.s390.vmoh(<8 x i16>, <8 x i16>)
92 declare <2 x i64> @llvm.s390.vmof(<4 x i32>, <4 x i32>)
93 declare <8 x i16> @llvm.s390.vmlob(<16 x i8>, <16 x i8>)
94 declare <4 x i32> @llvm.s390.vmloh(<8 x i16>, <8 x i16>)
95 declare <2 x i64> @llvm.s390.vmlof(<4 x i32>, <4 x i32>)
96 declare <16 x i8> @llvm.s390.verllvb(<16 x i8>, <16 x i8>)
97 declare <8 x i16> @llvm.s390.verllvh(<8 x i16>, <8 x i16>)
98 declare <4 x i32> @llvm.s390.verllvf(<4 x i32>, <4 x i32>)
99 declare <2 x i64> @llvm.s390.verllvg(<2 x i64>, <2 x i64>)
100 declare <16 x i8> @llvm.s390.verllb(<16 x i8>, i32)
101 declare <8 x i16> @llvm.s390.verllh(<8 x i16>, i32)
102 declare <4 x i32> @llvm.s390.verllf(<4 x i32>, i32)
103 declare <2 x i64> @llvm.s390.verllg(<2 x i64>, i32)
104 declare <16 x i8> @llvm.s390.verimb(<16 x i8>, <16 x i8>, <16 x i8>, i32)
105 declare <8 x i16> @llvm.s390.verimh(<8 x i16>, <8 x i16>, <8 x i16>, i32)
106 declare <4 x i32> @llvm.s390.verimf(<4 x i32>, <4 x i32>, <4 x i32>, i32)
107 declare <2 x i64> @llvm.s390.verimg(<2 x i64>, <2 x i64>, <2 x i64>, i32)
108 declare <16 x i8> @llvm.s390.vsl(<16 x i8>, <16 x i8>)
109 declare <16 x i8> @llvm.s390.vslb(<16 x i8>, <16 x i8>)
110 declare <16 x i8> @llvm.s390.vsra(<16 x i8>, <16 x i8>)
111 declare <16 x i8> @llvm.s390.vsrab(<16 x i8>, <16 x i8>)
112 declare <16 x i8> @llvm.s390.vsrl(<16 x i8>, <16 x i8>)
113 declare <16 x i8> @llvm.s390.vsrlb(<16 x i8>, <16 x i8>)
114 declare <16 x i8> @llvm.s390.vsldb(<16 x i8>, <16 x i8>, i32)
115 declare <16 x i8> @llvm.s390.vscbib(<16 x i8>, <16 x i8>)
116 declare <8 x i16> @llvm.s390.vscbih(<8 x i16>, <8 x i16>)
117 declare <4 x i32> @llvm.s390.vscbif(<4 x i32>, <4 x i32>)
118 declare <2 x i64> @llvm.s390.vscbig(<2 x i64>, <2 x i64>)
119 declare <16 x i8> @llvm.s390.vsq(<16 x i8>, <16 x i8>)
120 declare <16 x i8> @llvm.s390.vsbiq(<16 x i8>, <16 x i8>, <16 x i8>)
121 declare <16 x i8> @llvm.s390.vscbiq(<16 x i8>, <16 x i8>)
122 declare <16 x i8> @llvm.s390.vsbcbiq(<16 x i8>, <16 x i8>, <16 x i8>)
123 declare <4 x i32> @llvm.s390.vsumb(<16 x i8>, <16 x i8>)
124 declare <4 x i32> @llvm.s390.vsumh(<8 x i16>, <8 x i16>)
125 declare <2 x i64> @llvm.s390.vsumgh(<8 x i16>, <8 x i16>)
126 declare <2 x i64> @llvm.s390.vsumgf(<4 x i32>, <4 x i32>)
127 declare <16 x i8> @llvm.s390.vsumqf(<4 x i32>, <4 x i32>)
128 declare <16 x i8> @llvm.s390.vsumqg(<2 x i64>, <2 x i64>)
129 declare i32 @llvm.s390.vtm(<16 x i8>, <16 x i8>)
130 declare {<16 x i8>, i32} @llvm.s390.vceqbs(<16 x i8>, <16 x i8>)
131 declare {<8 x i16>, i32} @llvm.s390.vceqhs(<8 x i16>, <8 x i16>)
132 declare {<4 x i32>, i32} @llvm.s390.vceqfs(<4 x i32>, <4 x i32>)
133 declare {<2 x i64>, i32} @llvm.s390.vceqgs(<2 x i64>, <2 x i64>)
134 declare {<16 x i8>, i32} @llvm.s390.vchbs(<16 x i8>, <16 x i8>)
135 declare {<8 x i16>, i32} @llvm.s390.vchhs(<8 x i16>, <8 x i16>)
136 declare {<4 x i32>, i32} @llvm.s390.vchfs(<4 x i32>, <4 x i32>)
137 declare {<2 x i64>, i32} @llvm.s390.vchgs(<2 x i64>, <2 x i64>)
138 declare {<16 x i8>, i32} @llvm.s390.vchlbs(<16 x i8>, <16 x i8>)
139 declare {<8 x i16>, i32} @llvm.s390.vchlhs(<8 x i16>, <8 x i16>)
140 declare {<4 x i32>, i32} @llvm.s390.vchlfs(<4 x i32>, <4 x i32>)
141 declare {<2 x i64>, i32} @llvm.s390.vchlgs(<2 x i64>, <2 x i64>)
142 declare <16 x i8> @llvm.s390.vfaeb(<16 x i8>, <16 x i8>, i32)
143 declare <8 x i16> @llvm.s390.vfaeh(<8 x i16>, <8 x i16>, i32)
144 declare <4 x i32> @llvm.s390.vfaef(<4 x i32>, <4 x i32>, i32)
145 declare {<16 x i8>, i32} @llvm.s390.vfaebs(<16 x i8>, <16 x i8>, i32)
146 declare {<8 x i16>, i32} @llvm.s390.vfaehs(<8 x i16>, <8 x i16>, i32)
147 declare {<4 x i32>, i32} @llvm.s390.vfaefs(<4 x i32>, <4 x i32>, i32)
148 declare <16 x i8> @llvm.s390.vfaezb(<16 x i8>, <16 x i8>, i32)
149 declare <8 x i16> @llvm.s390.vfaezh(<8 x i16>, <8 x i16>, i32)
150 declare <4 x i32> @llvm.s390.vfaezf(<4 x i32>, <4 x i32>, i32)
151 declare {<16 x i8>, i32} @llvm.s390.vfaezbs(<16 x i8>, <16 x i8>, i32)
152 declare {<8 x i16>, i32} @llvm.s390.vfaezhs(<8 x i16>, <8 x i16>, i32)
153 declare {<4 x i32>, i32} @llvm.s390.vfaezfs(<4 x i32>, <4 x i32>, i32)
154 declare <16 x i8> @llvm.s390.vfeeb(<16 x i8>, <16 x i8>)
155 declare <8 x i16> @llvm.s390.vfeeh(<8 x i16>, <8 x i16>)
156 declare <4 x i32> @llvm.s390.vfeef(<4 x i32>, <4 x i32>)
157 declare {<16 x i8>, i32} @llvm.s390.vfeebs(<16 x i8>, <16 x i8>)
158 declare {<8 x i16>, i32} @llvm.s390.vfeehs(<8 x i16>, <8 x i16>)
159 declare {<4 x i32>, i32} @llvm.s390.vfeefs(<4 x i32>, <4 x i32>)
160 declare <16 x i8> @llvm.s390.vfeezb(<16 x i8>, <16 x i8>)
161 declare <8 x i16> @llvm.s390.vfeezh(<8 x i16>, <8 x i16>)
162 declare <4 x i32> @llvm.s390.vfeezf(<4 x i32>, <4 x i32>)
163 declare {<16 x i8>, i32} @llvm.s390.vfeezbs(<16 x i8>, <16 x i8>)
164 declare {<8 x i16>, i32} @llvm.s390.vfeezhs(<8 x i16>, <8 x i16>)
165 declare {<4 x i32>, i32} @llvm.s390.vfeezfs(<4 x i32>, <4 x i32>)
166 declare <16 x i8> @llvm.s390.vfeneb(<16 x i8>, <16 x i8>)
167 declare <8 x i16> @llvm.s390.vfeneh(<8 x i16>, <8 x i16>)
168 declare <4 x i32> @llvm.s390.vfenef(<4 x i32>, <4 x i32>)
169 declare {<16 x i8>, i32} @llvm.s390.vfenebs(<16 x i8>, <16 x i8>)
170 declare {<8 x i16>, i32} @llvm.s390.vfenehs(<8 x i16>, <8 x i16>)
171 declare {<4 x i32>, i32} @llvm.s390.vfenefs(<4 x i32>, <4 x i32>)
172 declare <16 x i8> @llvm.s390.vfenezb(<16 x i8>, <16 x i8>)
173 declare <8 x i16> @llvm.s390.vfenezh(<8 x i16>, <8 x i16>)
174 declare <4 x i32> @llvm.s390.vfenezf(<4 x i32>, <4 x i32>)
175 declare {<16 x i8>, i32} @llvm.s390.vfenezbs(<16 x i8>, <16 x i8>)
176 declare {<8 x i16>, i32} @llvm.s390.vfenezhs(<8 x i16>, <8 x i16>)
177 declare {<4 x i32>, i32} @llvm.s390.vfenezfs(<4 x i32>, <4 x i32>)
178 declare <16 x i8> @llvm.s390.vistrb(<16 x i8>)
179 declare <8 x i16> @llvm.s390.vistrh(<8 x i16>)
180 declare <4 x i32> @llvm.s390.vistrf(<4 x i32>)
181 declare {<16 x i8>, i32} @llvm.s390.vistrbs(<16 x i8>)
182 declare {<8 x i16>, i32} @llvm.s390.vistrhs(<8 x i16>)
183 declare {<4 x i32>, i32} @llvm.s390.vistrfs(<4 x i32>)
184 declare <16 x i8> @llvm.s390.vstrcb(<16 x i8>, <16 x i8>, <16 x i8>, i32)
185 declare <8 x i16> @llvm.s390.vstrch(<8 x i16>, <8 x i16>, <8 x i16>, i32)
186 declare <4 x i32> @llvm.s390.vstrcf(<4 x i32>, <4 x i32>, <4 x i32>, i32)
187 declare {<16 x i8>, i32} @llvm.s390.vstrcbs(<16 x i8>, <16 x i8>, <16 x i8>,
189 declare {<8 x i16>, i32} @llvm.s390.vstrchs(<8 x i16>, <8 x i16>, <8 x i16>,
191 declare {<4 x i32>, i32} @llvm.s390.vstrcfs(<4 x i32>, <4 x i32>, <4 x i32>,
193 declare <16 x i8> @llvm.s390.vstrczb(<16 x i8>, <16 x i8>, <16 x i8>, i32)
194 declare <8 x i16> @llvm.s390.vstrczh(<8 x i16>, <8 x i16>, <8 x i16>, i32)
195 declare <4 x i32> @llvm.s390.vstrczf(<4 x i32>, <4 x i32>, <4 x i32>, i32)
196 declare {<16 x i8>, i32} @llvm.s390.vstrczbs(<16 x i8>, <16 x i8>, <16 x i8>,
198 declare {<8 x i16>, i32} @llvm.s390.vstrczhs(<8 x i16>, <8 x i16>, <8 x i16>,
200 declare {<4 x i32>, i32} @llvm.s390.vstrczfs(<4 x i32>, <4 x i32>, <4 x i32>,
202 declare {<2 x i64>, i32} @llvm.s390.vfcedbs(<2 x double>, <2 x double>)
203 declare {<2 x i64>, i32} @llvm.s390.vfchdbs(<2 x double>, <2 x double>)
204 declare {<2 x i64>, i32} @llvm.s390.vfchedbs(<2 x double>, <2 x double>)
205 declare {<2 x i64>, i32} @llvm.s390.vftcidb(<2 x double>, i32)
206 declare <2 x double> @llvm.s390.vfidb(<2 x double>, i32, i32)
208 ; LCBB with the lowest M3 operand.
209 define i32 @test_lcbb1(i8 *%ptr) {
210 ; CHECK-LABEL: test_lcbb1:
211 ; CHECK: lcbb %r2, 0(%r2), 0
213 %res = call i32 @llvm.s390.lcbb(i8 *%ptr, i32 0)
217 ; LCBB with the highest M3 operand.
218 define i32 @test_lcbb2(i8 *%ptr) {
219 ; CHECK-LABEL: test_lcbb2:
220 ; CHECK: lcbb %r2, 0(%r2), 15
222 %res = call i32 @llvm.s390.lcbb(i8 *%ptr, i32 15)
226 ; LCBB with a displacement and index.
227 define i32 @test_lcbb3(i8 *%base, i64 %index) {
228 ; CHECK-LABEL: test_lcbb3:
229 ; CHECK: lcbb %r2, 4095({{%r2,%r3|%r3,%r2}}), 4
231 %add = add i64 %index, 4095
232 %ptr = getelementptr i8, i8 *%base, i64 %add
233 %res = call i32 @llvm.s390.lcbb(i8 *%ptr, i32 4)
237 ; LCBB with an out-of-range displacement.
238 define i32 @test_lcbb4(i8 *%base) {
239 ; CHECK-LABEL: test_lcbb4:
240 ; CHECK: lcbb %r2, 0({{%r[1-5]}}), 5
242 %ptr = getelementptr i8, i8 *%base, i64 4096
243 %res = call i32 @llvm.s390.lcbb(i8 *%ptr, i32 5)
247 ; VLBB with the lowest M3 operand.
248 define <16 x i8> @test_vlbb1(i8 *%ptr) {
249 ; CHECK-LABEL: test_vlbb1:
250 ; CHECK: vlbb %v24, 0(%r2), 0
252 %res = call <16 x i8> @llvm.s390.vlbb(i8 *%ptr, i32 0)
256 ; VLBB with the highest M3 operand.
257 define <16 x i8> @test_vlbb2(i8 *%ptr) {
258 ; CHECK-LABEL: test_vlbb2:
259 ; CHECK: vlbb %v24, 0(%r2), 15
261 %res = call <16 x i8> @llvm.s390.vlbb(i8 *%ptr, i32 15)
265 ; VLBB with a displacement and index.
266 define <16 x i8> @test_vlbb3(i8 *%base, i64 %index) {
267 ; CHECK-LABEL: test_vlbb3:
268 ; CHECK: vlbb %v24, 4095({{%r2,%r3|%r3,%r2}}), 4
270 %add = add i64 %index, 4095
271 %ptr = getelementptr i8, i8 *%base, i64 %add
272 %res = call <16 x i8> @llvm.s390.vlbb(i8 *%ptr, i32 4)
276 ; VLBB with an out-of-range displacement.
277 define <16 x i8> @test_vlbb4(i8 *%base) {
278 ; CHECK-LABEL: test_vlbb4:
279 ; CHECK: vlbb %v24, 0({{%r[1-5]}}), 5
281 %ptr = getelementptr i8, i8 *%base, i64 4096
282 %res = call <16 x i8> @llvm.s390.vlbb(i8 *%ptr, i32 5)
286 ; VLL with the lowest in-range displacement.
287 define <16 x i8> @test_vll1(i8 *%ptr, i32 %length) {
288 ; CHECK-LABEL: test_vll1:
289 ; CHECK: vll %v24, %r3, 0(%r2)
291 %res = call <16 x i8> @llvm.s390.vll(i32 %length, i8 *%ptr)
295 ; VLL with the highest in-range displacement.
296 define <16 x i8> @test_vll2(i8 *%base, i32 %length) {
297 ; CHECK-LABEL: test_vll2:
298 ; CHECK: vll %v24, %r3, 4095(%r2)
300 %ptr = getelementptr i8, i8 *%base, i64 4095
301 %res = call <16 x i8> @llvm.s390.vll(i32 %length, i8 *%ptr)
305 ; VLL with an out-of-range displacementa.
306 define <16 x i8> @test_vll3(i8 *%base, i32 %length) {
307 ; CHECK-LABEL: test_vll3:
308 ; CHECK: vll %v24, %r3, 0({{%r[1-5]}})
310 %ptr = getelementptr i8, i8 *%base, i64 4096
311 %res = call <16 x i8> @llvm.s390.vll(i32 %length, i8 *%ptr)
315 ; Check that VLL doesn't allow an index.
316 define <16 x i8> @test_vll4(i8 *%base, i64 %index, i32 %length) {
317 ; CHECK-LABEL: test_vll4:
318 ; CHECK: vll %v24, %r4, 0({{%r[1-5]}})
320 %ptr = getelementptr i8, i8 *%base, i64 %index
321 %res = call <16 x i8> @llvm.s390.vll(i32 %length, i8 *%ptr)
325 ; VPDI taking element 0 from each half.
326 define <2 x i64> @test_vpdi1(<2 x i64> %a, <2 x i64> %b) {
327 ; CHECK-LABEL: test_vpdi1:
328 ; CHECK: vpdi %v24, %v24, %v26, 0
330 %res = call <2 x i64> @llvm.s390.vpdi(<2 x i64> %a, <2 x i64> %b, i32 0)
334 ; VPDI taking element 1 from each half.
335 define <2 x i64> @test_vpdi2(<2 x i64> %a, <2 x i64> %b) {
336 ; CHECK-LABEL: test_vpdi2:
337 ; CHECK: vpdi %v24, %v24, %v26, 10
339 %res = call <2 x i64> @llvm.s390.vpdi(<2 x i64> %a, <2 x i64> %b, i32 10)
344 define <16 x i8> @test_vperm(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
345 ; CHECK-LABEL: test_vperm:
346 ; CHECK: vperm %v24, %v24, %v26, %v28
348 %res = call <16 x i8> @llvm.s390.vperm(<16 x i8> %a, <16 x i8> %b,
354 define <16 x i8> @test_vpksh(<8 x i16> %a, <8 x i16> %b) {
355 ; CHECK-LABEL: test_vpksh:
356 ; CHECK: vpksh %v24, %v24, %v26
358 %res = call <16 x i8> @llvm.s390.vpksh(<8 x i16> %a, <8 x i16> %b)
363 define <8 x i16> @test_vpksf(<4 x i32> %a, <4 x i32> %b) {
364 ; CHECK-LABEL: test_vpksf:
365 ; CHECK: vpksf %v24, %v24, %v26
367 %res = call <8 x i16> @llvm.s390.vpksf(<4 x i32> %a, <4 x i32> %b)
372 define <4 x i32> @test_vpksg(<2 x i64> %a, <2 x i64> %b) {
373 ; CHECK-LABEL: test_vpksg:
374 ; CHECK: vpksg %v24, %v24, %v26
376 %res = call <4 x i32> @llvm.s390.vpksg(<2 x i64> %a, <2 x i64> %b)
380 ; VPKSHS with no processing of the result.
381 define <16 x i8> @test_vpkshs(<8 x i16> %a, <8 x i16> %b, i32 *%ccptr) {
382 ; CHECK-LABEL: test_vpkshs:
383 ; CHECK: vpkshs %v24, %v24, %v26
384 ; CHECK: ipm [[REG:%r[0-5]]]
385 ; CHECK: srl [[REG]], 28
386 ; CHECK: st [[REG]], 0(%r2)
388 %call = call {<16 x i8>, i32} @llvm.s390.vpkshs(<8 x i16> %a, <8 x i16> %b)
389 %res = extractvalue {<16 x i8>, i32} %call, 0
390 %cc = extractvalue {<16 x i8>, i32} %call, 1
391 store i32 %cc, i32 *%ccptr
395 ; VPKSHS, storing to %ptr if all values were saturated.
396 define <16 x i8> @test_vpkshs_all_store(<8 x i16> %a, <8 x i16> %b, i32 *%ptr) {
397 ; CHECK-LABEL: test_vpkshs_all_store:
398 ; CHECK: vpkshs %v24, %v24, %v26
399 ; CHECK-NEXT: {{jno|jle}} {{\.L*}}
400 ; CHECK: mvhi 0(%r2), 0
402 %call = call {<16 x i8>, i32} @llvm.s390.vpkshs(<8 x i16> %a, <8 x i16> %b)
403 %res = extractvalue {<16 x i8>, i32} %call, 0
404 %cc = extractvalue {<16 x i8>, i32} %call, 1
405 %cmp = icmp uge i32 %cc, 3
406 br i1 %cmp, label %store, label %exit
409 store i32 0, i32 *%ptr
416 ; VPKSFS with no processing of the result.
417 define <8 x i16> @test_vpksfs(<4 x i32> %a, <4 x i32> %b, i32 *%ccptr) {
418 ; CHECK-LABEL: test_vpksfs:
419 ; CHECK: vpksfs %v24, %v24, %v26
420 ; CHECK: ipm [[REG:%r[0-5]]]
421 ; CHECK: srl [[REG]], 28
422 ; CHECK: st [[REG]], 0(%r2)
424 %call = call {<8 x i16>, i32} @llvm.s390.vpksfs(<4 x i32> %a, <4 x i32> %b)
425 %res = extractvalue {<8 x i16>, i32} %call, 0
426 %cc = extractvalue {<8 x i16>, i32} %call, 1
427 store i32 %cc, i32 *%ccptr
431 ; VPKSFS, storing to %ptr if any values were saturated.
432 define <8 x i16> @test_vpksfs_any_store(<4 x i32> %a, <4 x i32> %b, i32 *%ptr) {
433 ; CHECK-LABEL: test_vpksfs_any_store:
434 ; CHECK: vpksfs %v24, %v24, %v26
435 ; CHECK-NEXT: {{jhe|je}} {{\.L*}}
436 ; CHECK: mvhi 0(%r2), 0
438 %call = call {<8 x i16>, i32} @llvm.s390.vpksfs(<4 x i32> %a, <4 x i32> %b)
439 %res = extractvalue {<8 x i16>, i32} %call, 0
440 %cc = extractvalue {<8 x i16>, i32} %call, 1
441 %cmp = icmp ugt i32 %cc, 0
442 br i1 %cmp, label %store, label %exit
445 store i32 0, i32 *%ptr
452 ; VPKSGS with no processing of the result.
453 define <4 x i32> @test_vpksgs(<2 x i64> %a, <2 x i64> %b, i32 *%ccptr) {
454 ; CHECK-LABEL: test_vpksgs:
455 ; CHECK: vpksgs %v24, %v24, %v26
456 ; CHECK: ipm [[REG:%r[0-5]]]
457 ; CHECK: srl [[REG]], 28
458 ; CHECK: st [[REG]], 0(%r2)
460 %call = call {<4 x i32>, i32} @llvm.s390.vpksgs(<2 x i64> %a, <2 x i64> %b)
461 %res = extractvalue {<4 x i32>, i32} %call, 0
462 %cc = extractvalue {<4 x i32>, i32} %call, 1
463 store i32 %cc, i32 *%ccptr
467 ; VPKSGS, storing to %ptr if no elements were saturated
468 define <4 x i32> @test_vpksgs_none_store(<2 x i64> %a, <2 x i64> %b,
470 ; CHECK-LABEL: test_vpksgs_none_store:
471 ; CHECK: vpksgs %v24, %v24, %v26
472 ; CHECK-NEXT: {{jnhe|jne}} {{\.L*}}
473 ; CHECK: mvhi 0(%r2), 0
475 %call = call {<4 x i32>, i32} @llvm.s390.vpksgs(<2 x i64> %a, <2 x i64> %b)
476 %res = extractvalue {<4 x i32>, i32} %call, 0
477 %cc = extractvalue {<4 x i32>, i32} %call, 1
478 %cmp = icmp sle i32 %cc, 0
479 br i1 %cmp, label %store, label %exit
482 store i32 0, i32 *%ptr
490 define <16 x i8> @test_vpklsh(<8 x i16> %a, <8 x i16> %b) {
491 ; CHECK-LABEL: test_vpklsh:
492 ; CHECK: vpklsh %v24, %v24, %v26
494 %res = call <16 x i8> @llvm.s390.vpklsh(<8 x i16> %a, <8 x i16> %b)
499 define <8 x i16> @test_vpklsf(<4 x i32> %a, <4 x i32> %b) {
500 ; CHECK-LABEL: test_vpklsf:
501 ; CHECK: vpklsf %v24, %v24, %v26
503 %res = call <8 x i16> @llvm.s390.vpklsf(<4 x i32> %a, <4 x i32> %b)
508 define <4 x i32> @test_vpklsg(<2 x i64> %a, <2 x i64> %b) {
509 ; CHECK-LABEL: test_vpklsg:
510 ; CHECK: vpklsg %v24, %v24, %v26
512 %res = call <4 x i32> @llvm.s390.vpklsg(<2 x i64> %a, <2 x i64> %b)
516 ; VPKLSHS with no processing of the result.
517 define <16 x i8> @test_vpklshs(<8 x i16> %a, <8 x i16> %b, i32 *%ccptr) {
518 ; CHECK-LABEL: test_vpklshs:
519 ; CHECK: vpklshs %v24, %v24, %v26
520 ; CHECK: ipm [[REG:%r[0-5]]]
521 ; CHECK: srl [[REG]], 28
522 ; CHECK: st [[REG]], 0(%r2)
524 %call = call {<16 x i8>, i32} @llvm.s390.vpklshs(<8 x i16> %a, <8 x i16> %b)
525 %res = extractvalue {<16 x i8>, i32} %call, 0
526 %cc = extractvalue {<16 x i8>, i32} %call, 1
527 store i32 %cc, i32 *%ccptr
531 ; VPKLSHS, storing to %ptr if all values were saturated.
532 define <16 x i8> @test_vpklshs_all_store(<8 x i16> %a, <8 x i16> %b,
534 ; CHECK-LABEL: test_vpklshs_all_store:
535 ; CHECK: vpklshs %v24, %v24, %v26
536 ; CHECK-NEXT: {{jno|jle}} {{\.L*}}
537 ; CHECK: mvhi 0(%r2), 0
539 %call = call {<16 x i8>, i32} @llvm.s390.vpklshs(<8 x i16> %a, <8 x i16> %b)
540 %res = extractvalue {<16 x i8>, i32} %call, 0
541 %cc = extractvalue {<16 x i8>, i32} %call, 1
542 %cmp = icmp eq i32 %cc, 3
543 br i1 %cmp, label %store, label %exit
546 store i32 0, i32 *%ptr
553 ; VPKLSFS with no processing of the result.
554 define <8 x i16> @test_vpklsfs(<4 x i32> %a, <4 x i32> %b, i32 *%ccptr) {
555 ; CHECK-LABEL: test_vpklsfs:
556 ; CHECK: vpklsfs %v24, %v24, %v26
557 ; CHECK: ipm [[REG:%r[0-5]]]
558 ; CHECK: srl [[REG]], 28
559 ; CHECK: st [[REG]], 0(%r2)
561 %call = call {<8 x i16>, i32} @llvm.s390.vpklsfs(<4 x i32> %a, <4 x i32> %b)
562 %res = extractvalue {<8 x i16>, i32} %call, 0
563 %cc = extractvalue {<8 x i16>, i32} %call, 1
564 store i32 %cc, i32 *%ccptr
568 ; VPKLSFS, storing to %ptr if any values were saturated.
569 define <8 x i16> @test_vpklsfs_any_store(<4 x i32> %a, <4 x i32> %b,
571 ; CHECK-LABEL: test_vpklsfs_any_store:
572 ; CHECK: vpklsfs %v24, %v24, %v26
573 ; CHECK-NEXT: {{jhe|je}} {{\.L*}}
574 ; CHECK: mvhi 0(%r2), 0
576 %call = call {<8 x i16>, i32} @llvm.s390.vpklsfs(<4 x i32> %a, <4 x i32> %b)
577 %res = extractvalue {<8 x i16>, i32} %call, 0
578 %cc = extractvalue {<8 x i16>, i32} %call, 1
579 %cmp = icmp ne i32 %cc, 0
580 br i1 %cmp, label %store, label %exit
583 store i32 0, i32 *%ptr
590 ; VPKLSGS with no processing of the result.
591 define <4 x i32> @test_vpklsgs(<2 x i64> %a, <2 x i64> %b, i32 *%ccptr) {
592 ; CHECK-LABEL: test_vpklsgs:
593 ; CHECK: vpklsgs %v24, %v24, %v26
594 ; CHECK: ipm [[REG:%r[0-5]]]
595 ; CHECK: srl [[REG]], 28
596 ; CHECK: st [[REG]], 0(%r2)
598 %call = call {<4 x i32>, i32} @llvm.s390.vpklsgs(<2 x i64> %a, <2 x i64> %b)
599 %res = extractvalue {<4 x i32>, i32} %call, 0
600 %cc = extractvalue {<4 x i32>, i32} %call, 1
601 store i32 %cc, i32 *%ccptr
605 ; VPKLSGS, storing to %ptr if no elements were saturated
606 define <4 x i32> @test_vpklsgs_none_store(<2 x i64> %a, <2 x i64> %b,
608 ; CHECK-LABEL: test_vpklsgs_none_store:
609 ; CHECK: vpklsgs %v24, %v24, %v26
610 ; CHECK-NEXT: {{jnhe|jne}} {{\.L*}}
611 ; CHECK: mvhi 0(%r2), 0
613 %call = call {<4 x i32>, i32} @llvm.s390.vpklsgs(<2 x i64> %a, <2 x i64> %b)
614 %res = extractvalue {<4 x i32>, i32} %call, 0
615 %cc = extractvalue {<4 x i32>, i32} %call, 1
616 %cmp = icmp eq i32 %cc, 0
617 br i1 %cmp, label %store, label %exit
620 store i32 0, i32 *%ptr
627 ; VSTL with the lowest in-range displacement.
628 define void @test_vstl1(<16 x i8> %vec, i8 *%ptr, i32 %length) {
629 ; CHECK-LABEL: test_vstl1:
630 ; CHECK: vstl %v24, %r3, 0(%r2)
632 call void @llvm.s390.vstl(<16 x i8> %vec, i32 %length, i8 *%ptr)
636 ; VSTL with the highest in-range displacement.
637 define void @test_vstl2(<16 x i8> %vec, i8 *%base, i32 %length) {
638 ; CHECK-LABEL: test_vstl2:
639 ; CHECK: vstl %v24, %r3, 4095(%r2)
641 %ptr = getelementptr i8, i8 *%base, i64 4095
642 call void @llvm.s390.vstl(<16 x i8> %vec, i32 %length, i8 *%ptr)
646 ; VSTL with an out-of-range displacement.
647 define void @test_vstl3(<16 x i8> %vec, i8 *%base, i32 %length) {
648 ; CHECK-LABEL: test_vstl3:
649 ; CHECK: vstl %v24, %r3, 0({{%r[1-5]}})
651 %ptr = getelementptr i8, i8 *%base, i64 4096
652 call void @llvm.s390.vstl(<16 x i8> %vec, i32 %length, i8 *%ptr)
656 ; Check that VSTL doesn't allow an index.
657 define void @test_vstl4(<16 x i8> %vec, i8 *%base, i64 %index, i32 %length) {
658 ; CHECK-LABEL: test_vstl4:
659 ; CHECK: vstl %v24, %r4, 0({{%r[1-5]}})
661 %ptr = getelementptr i8, i8 *%base, i64 %index
662 call void @llvm.s390.vstl(<16 x i8> %vec, i32 %length, i8 *%ptr)
667 define <8 x i16> @test_vuphb(<16 x i8> %a) {
668 ; CHECK-LABEL: test_vuphb:
669 ; CHECK: vuphb %v24, %v24
671 %res = call <8 x i16> @llvm.s390.vuphb(<16 x i8> %a)
676 define <4 x i32> @test_vuphh(<8 x i16> %a) {
677 ; CHECK-LABEL: test_vuphh:
678 ; CHECK: vuphh %v24, %v24
680 %res = call <4 x i32> @llvm.s390.vuphh(<8 x i16> %a)
685 define <2 x i64> @test_vuphf(<4 x i32> %a) {
686 ; CHECK-LABEL: test_vuphf:
687 ; CHECK: vuphf %v24, %v24
689 %res = call <2 x i64> @llvm.s390.vuphf(<4 x i32> %a)
694 define <8 x i16> @test_vuplhb(<16 x i8> %a) {
695 ; CHECK-LABEL: test_vuplhb:
696 ; CHECK: vuplhb %v24, %v24
698 %res = call <8 x i16> @llvm.s390.vuplhb(<16 x i8> %a)
703 define <4 x i32> @test_vuplhh(<8 x i16> %a) {
704 ; CHECK-LABEL: test_vuplhh:
705 ; CHECK: vuplhh %v24, %v24
707 %res = call <4 x i32> @llvm.s390.vuplhh(<8 x i16> %a)
712 define <2 x i64> @test_vuplhf(<4 x i32> %a) {
713 ; CHECK-LABEL: test_vuplhf:
714 ; CHECK: vuplhf %v24, %v24
716 %res = call <2 x i64> @llvm.s390.vuplhf(<4 x i32> %a)
721 define <8 x i16> @test_vuplb(<16 x i8> %a) {
722 ; CHECK-LABEL: test_vuplb:
723 ; CHECK: vuplb %v24, %v24
725 %res = call <8 x i16> @llvm.s390.vuplb(<16 x i8> %a)
730 define <4 x i32> @test_vuplhw(<8 x i16> %a) {
731 ; CHECK-LABEL: test_vuplhw:
732 ; CHECK: vuplhw %v24, %v24
734 %res = call <4 x i32> @llvm.s390.vuplhw(<8 x i16> %a)
739 define <2 x i64> @test_vuplf(<4 x i32> %a) {
740 ; CHECK-LABEL: test_vuplf:
741 ; CHECK: vuplf %v24, %v24
743 %res = call <2 x i64> @llvm.s390.vuplf(<4 x i32> %a)
748 define <8 x i16> @test_vupllb(<16 x i8> %a) {
749 ; CHECK-LABEL: test_vupllb:
750 ; CHECK: vupllb %v24, %v24
752 %res = call <8 x i16> @llvm.s390.vupllb(<16 x i8> %a)
757 define <4 x i32> @test_vupllh(<8 x i16> %a) {
758 ; CHECK-LABEL: test_vupllh:
759 ; CHECK: vupllh %v24, %v24
761 %res = call <4 x i32> @llvm.s390.vupllh(<8 x i16> %a)
766 define <2 x i64> @test_vupllf(<4 x i32> %a) {
767 ; CHECK-LABEL: test_vupllf:
768 ; CHECK: vupllf %v24, %v24
770 %res = call <2 x i64> @llvm.s390.vupllf(<4 x i32> %a)
775 define <16 x i8> @test_vaccb(<16 x i8> %a, <16 x i8> %b) {
776 ; CHECK-LABEL: test_vaccb:
777 ; CHECK: vaccb %v24, %v24, %v26
779 %res = call <16 x i8> @llvm.s390.vaccb(<16 x i8> %a, <16 x i8> %b)
784 define <8 x i16> @test_vacch(<8 x i16> %a, <8 x i16> %b) {
785 ; CHECK-LABEL: test_vacch:
786 ; CHECK: vacch %v24, %v24, %v26
788 %res = call <8 x i16> @llvm.s390.vacch(<8 x i16> %a, <8 x i16> %b)
793 define <4 x i32> @test_vaccf(<4 x i32> %a, <4 x i32> %b) {
794 ; CHECK-LABEL: test_vaccf:
795 ; CHECK: vaccf %v24, %v24, %v26
797 %res = call <4 x i32> @llvm.s390.vaccf(<4 x i32> %a, <4 x i32> %b)
802 define <2 x i64> @test_vaccg(<2 x i64> %a, <2 x i64> %b) {
803 ; CHECK-LABEL: test_vaccg:
804 ; CHECK: vaccg %v24, %v24, %v26
806 %res = call <2 x i64> @llvm.s390.vaccg(<2 x i64> %a, <2 x i64> %b)
811 define <16 x i8> @test_vaq(<16 x i8> %a, <16 x i8> %b) {
812 ; CHECK-LABEL: test_vaq:
813 ; CHECK: vaq %v24, %v24, %v26
815 %res = call <16 x i8> @llvm.s390.vaq(<16 x i8> %a, <16 x i8> %b)
820 define <16 x i8> @test_vacq(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
821 ; CHECK-LABEL: test_vacq:
822 ; CHECK: vacq %v24, %v24, %v26, %v28
824 %res = call <16 x i8> @llvm.s390.vacq(<16 x i8> %a, <16 x i8> %b,
830 define <16 x i8> @test_vaccq(<16 x i8> %a, <16 x i8> %b) {
831 ; CHECK-LABEL: test_vaccq:
832 ; CHECK: vaccq %v24, %v24, %v26
834 %res = call <16 x i8> @llvm.s390.vaccq(<16 x i8> %a, <16 x i8> %b)
839 define <16 x i8> @test_vacccq(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
840 ; CHECK-LABEL: test_vacccq:
841 ; CHECK: vacccq %v24, %v24, %v26, %v28
843 %res = call <16 x i8> @llvm.s390.vacccq(<16 x i8> %a, <16 x i8> %b,
849 define <16 x i8> @test_vavgb(<16 x i8> %a, <16 x i8> %b) {
850 ; CHECK-LABEL: test_vavgb:
851 ; CHECK: vavgb %v24, %v24, %v26
853 %res = call <16 x i8> @llvm.s390.vavgb(<16 x i8> %a, <16 x i8> %b)
858 define <8 x i16> @test_vavgh(<8 x i16> %a, <8 x i16> %b) {
859 ; CHECK-LABEL: test_vavgh:
860 ; CHECK: vavgh %v24, %v24, %v26
862 %res = call <8 x i16> @llvm.s390.vavgh(<8 x i16> %a, <8 x i16> %b)
867 define <4 x i32> @test_vavgf(<4 x i32> %a, <4 x i32> %b) {
868 ; CHECK-LABEL: test_vavgf:
869 ; CHECK: vavgf %v24, %v24, %v26
871 %res = call <4 x i32> @llvm.s390.vavgf(<4 x i32> %a, <4 x i32> %b)
876 define <2 x i64> @test_vavgg(<2 x i64> %a, <2 x i64> %b) {
877 ; CHECK-LABEL: test_vavgg:
878 ; CHECK: vavgg %v24, %v24, %v26
880 %res = call <2 x i64> @llvm.s390.vavgg(<2 x i64> %a, <2 x i64> %b)
885 define <16 x i8> @test_vavglb(<16 x i8> %a, <16 x i8> %b) {
886 ; CHECK-LABEL: test_vavglb:
887 ; CHECK: vavglb %v24, %v24, %v26
889 %res = call <16 x i8> @llvm.s390.vavglb(<16 x i8> %a, <16 x i8> %b)
894 define <8 x i16> @test_vavglh(<8 x i16> %a, <8 x i16> %b) {
895 ; CHECK-LABEL: test_vavglh:
896 ; CHECK: vavglh %v24, %v24, %v26
898 %res = call <8 x i16> @llvm.s390.vavglh(<8 x i16> %a, <8 x i16> %b)
903 define <4 x i32> @test_vavglf(<4 x i32> %a, <4 x i32> %b) {
904 ; CHECK-LABEL: test_vavglf:
905 ; CHECK: vavglf %v24, %v24, %v26
907 %res = call <4 x i32> @llvm.s390.vavglf(<4 x i32> %a, <4 x i32> %b)
912 define <2 x i64> @test_vavglg(<2 x i64> %a, <2 x i64> %b) {
913 ; CHECK-LABEL: test_vavglg:
914 ; CHECK: vavglg %v24, %v24, %v26
916 %res = call <2 x i64> @llvm.s390.vavglg(<2 x i64> %a, <2 x i64> %b)
921 define <4 x i32> @test_vcksm(<4 x i32> %a, <4 x i32> %b) {
922 ; CHECK-LABEL: test_vcksm:
923 ; CHECK: vcksm %v24, %v24, %v26
925 %res = call <4 x i32> @llvm.s390.vcksm(<4 x i32> %a, <4 x i32> %b)
930 define <8 x i16> @test_vgfmb(<16 x i8> %a, <16 x i8> %b) {
931 ; CHECK-LABEL: test_vgfmb:
932 ; CHECK: vgfmb %v24, %v24, %v26
934 %res = call <8 x i16> @llvm.s390.vgfmb(<16 x i8> %a, <16 x i8> %b)
939 define <4 x i32> @test_vgfmh(<8 x i16> %a, <8 x i16> %b) {
940 ; CHECK-LABEL: test_vgfmh:
941 ; CHECK: vgfmh %v24, %v24, %v26
943 %res = call <4 x i32> @llvm.s390.vgfmh(<8 x i16> %a, <8 x i16> %b)
948 define <2 x i64> @test_vgfmf(<4 x i32> %a, <4 x i32> %b) {
949 ; CHECK-LABEL: test_vgfmf:
950 ; CHECK: vgfmf %v24, %v24, %v26
952 %res = call <2 x i64> @llvm.s390.vgfmf(<4 x i32> %a, <4 x i32> %b)
957 define <16 x i8> @test_vgfmg(<2 x i64> %a, <2 x i64> %b) {
958 ; CHECK-LABEL: test_vgfmg:
959 ; CHECK: vgfmg %v24, %v24, %v26
961 %res = call <16 x i8> @llvm.s390.vgfmg(<2 x i64> %a, <2 x i64> %b)
966 define <8 x i16> @test_vgfmab(<16 x i8> %a, <16 x i8> %b, <8 x i16> %c) {
967 ; CHECK-LABEL: test_vgfmab:
968 ; CHECK: vgfmab %v24, %v24, %v26, %v28
970 %res = call <8 x i16> @llvm.s390.vgfmab(<16 x i8> %a, <16 x i8> %b,
976 define <4 x i32> @test_vgfmah(<8 x i16> %a, <8 x i16> %b, <4 x i32> %c) {
977 ; CHECK-LABEL: test_vgfmah:
978 ; CHECK: vgfmah %v24, %v24, %v26, %v28
980 %res = call <4 x i32> @llvm.s390.vgfmah(<8 x i16> %a, <8 x i16> %b,
986 define <2 x i64> @test_vgfmaf(<4 x i32> %a, <4 x i32> %b, <2 x i64> %c) {
987 ; CHECK-LABEL: test_vgfmaf:
988 ; CHECK: vgfmaf %v24, %v24, %v26, %v28
990 %res = call <2 x i64> @llvm.s390.vgfmaf(<4 x i32> %a, <4 x i32> %b,
996 define <16 x i8> @test_vgfmag(<2 x i64> %a, <2 x i64> %b, <16 x i8> %c) {
997 ; CHECK-LABEL: test_vgfmag:
998 ; CHECK: vgfmag %v24, %v24, %v26, %v28
1000 %res = call <16 x i8> @llvm.s390.vgfmag(<2 x i64> %a, <2 x i64> %b,
1006 define <16 x i8> @test_vmahb(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
1007 ; CHECK-LABEL: test_vmahb:
1008 ; CHECK: vmahb %v24, %v24, %v26, %v28
1010 %res = call <16 x i8> @llvm.s390.vmahb(<16 x i8> %a, <16 x i8> %b,
1016 define <8 x i16> @test_vmahh(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c) {
1017 ; CHECK-LABEL: test_vmahh:
1018 ; CHECK: vmahh %v24, %v24, %v26, %v28
1020 %res = call <8 x i16> @llvm.s390.vmahh(<8 x i16> %a, <8 x i16> %b,
1026 define <4 x i32> @test_vmahf(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
1027 ; CHECK-LABEL: test_vmahf:
1028 ; CHECK: vmahf %v24, %v24, %v26, %v28
1030 %res = call <4 x i32> @llvm.s390.vmahf(<4 x i32> %a, <4 x i32> %b,
1036 define <16 x i8> @test_vmalhb(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
1037 ; CHECK-LABEL: test_vmalhb:
1038 ; CHECK: vmalhb %v24, %v24, %v26, %v28
1040 %res = call <16 x i8> @llvm.s390.vmalhb(<16 x i8> %a, <16 x i8> %b,
1046 define <8 x i16> @test_vmalhh(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c) {
1047 ; CHECK-LABEL: test_vmalhh:
1048 ; CHECK: vmalhh %v24, %v24, %v26, %v28
1050 %res = call <8 x i16> @llvm.s390.vmalhh(<8 x i16> %a, <8 x i16> %b,
1056 define <4 x i32> @test_vmalhf(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
1057 ; CHECK-LABEL: test_vmalhf:
1058 ; CHECK: vmalhf %v24, %v24, %v26, %v28
1060 %res = call <4 x i32> @llvm.s390.vmalhf(<4 x i32> %a, <4 x i32> %b,
1066 define <8 x i16> @test_vmaeb(<16 x i8> %a, <16 x i8> %b, <8 x i16> %c) {
1067 ; CHECK-LABEL: test_vmaeb:
1068 ; CHECK: vmaeb %v24, %v24, %v26, %v28
1070 %res = call <8 x i16> @llvm.s390.vmaeb(<16 x i8> %a, <16 x i8> %b,
1076 define <4 x i32> @test_vmaeh(<8 x i16> %a, <8 x i16> %b, <4 x i32> %c) {
1077 ; CHECK-LABEL: test_vmaeh:
1078 ; CHECK: vmaeh %v24, %v24, %v26, %v28
1080 %res = call <4 x i32> @llvm.s390.vmaeh(<8 x i16> %a, <8 x i16> %b,
1086 define <2 x i64> @test_vmaef(<4 x i32> %a, <4 x i32> %b, <2 x i64> %c) {
1087 ; CHECK-LABEL: test_vmaef:
1088 ; CHECK: vmaef %v24, %v24, %v26, %v28
1090 %res = call <2 x i64> @llvm.s390.vmaef(<4 x i32> %a, <4 x i32> %b,
1096 define <8 x i16> @test_vmaleb(<16 x i8> %a, <16 x i8> %b, <8 x i16> %c) {
1097 ; CHECK-LABEL: test_vmaleb:
1098 ; CHECK: vmaleb %v24, %v24, %v26, %v28
1100 %res = call <8 x i16> @llvm.s390.vmaleb(<16 x i8> %a, <16 x i8> %b,
1106 define <4 x i32> @test_vmaleh(<8 x i16> %a, <8 x i16> %b, <4 x i32> %c) {
1107 ; CHECK-LABEL: test_vmaleh:
1108 ; CHECK: vmaleh %v24, %v24, %v26, %v28
1110 %res = call <4 x i32> @llvm.s390.vmaleh(<8 x i16> %a, <8 x i16> %b,
1116 define <2 x i64> @test_vmalef(<4 x i32> %a, <4 x i32> %b, <2 x i64> %c) {
1117 ; CHECK-LABEL: test_vmalef:
1118 ; CHECK: vmalef %v24, %v24, %v26, %v28
1120 %res = call <2 x i64> @llvm.s390.vmalef(<4 x i32> %a, <4 x i32> %b,
1126 define <8 x i16> @test_vmaob(<16 x i8> %a, <16 x i8> %b, <8 x i16> %c) {
1127 ; CHECK-LABEL: test_vmaob:
1128 ; CHECK: vmaob %v24, %v24, %v26, %v28
1130 %res = call <8 x i16> @llvm.s390.vmaob(<16 x i8> %a, <16 x i8> %b,
1136 define <4 x i32> @test_vmaoh(<8 x i16> %a, <8 x i16> %b, <4 x i32> %c) {
1137 ; CHECK-LABEL: test_vmaoh:
1138 ; CHECK: vmaoh %v24, %v24, %v26, %v28
1140 %res = call <4 x i32> @llvm.s390.vmaoh(<8 x i16> %a, <8 x i16> %b,
1146 define <2 x i64> @test_vmaof(<4 x i32> %a, <4 x i32> %b, <2 x i64> %c) {
1147 ; CHECK-LABEL: test_vmaof:
1148 ; CHECK: vmaof %v24, %v24, %v26, %v28
1150 %res = call <2 x i64> @llvm.s390.vmaof(<4 x i32> %a, <4 x i32> %b,
1156 define <8 x i16> @test_vmalob(<16 x i8> %a, <16 x i8> %b, <8 x i16> %c) {
1157 ; CHECK-LABEL: test_vmalob:
1158 ; CHECK: vmalob %v24, %v24, %v26, %v28
1160 %res = call <8 x i16> @llvm.s390.vmalob(<16 x i8> %a, <16 x i8> %b,
1166 define <4 x i32> @test_vmaloh(<8 x i16> %a, <8 x i16> %b, <4 x i32> %c) {
1167 ; CHECK-LABEL: test_vmaloh:
1168 ; CHECK: vmaloh %v24, %v24, %v26, %v28
1170 %res = call <4 x i32> @llvm.s390.vmaloh(<8 x i16> %a, <8 x i16> %b,
1176 define <2 x i64> @test_vmalof(<4 x i32> %a, <4 x i32> %b, <2 x i64> %c) {
1177 ; CHECK-LABEL: test_vmalof:
1178 ; CHECK: vmalof %v24, %v24, %v26, %v28
1180 %res = call <2 x i64> @llvm.s390.vmalof(<4 x i32> %a, <4 x i32> %b,
1186 define <16 x i8> @test_vmhb(<16 x i8> %a, <16 x i8> %b) {
1187 ; CHECK-LABEL: test_vmhb:
1188 ; CHECK: vmhb %v24, %v24, %v26
1190 %res = call <16 x i8> @llvm.s390.vmhb(<16 x i8> %a, <16 x i8> %b)
1195 define <8 x i16> @test_vmhh(<8 x i16> %a, <8 x i16> %b) {
1196 ; CHECK-LABEL: test_vmhh:
1197 ; CHECK: vmhh %v24, %v24, %v26
1199 %res = call <8 x i16> @llvm.s390.vmhh(<8 x i16> %a, <8 x i16> %b)
1204 define <4 x i32> @test_vmhf(<4 x i32> %a, <4 x i32> %b) {
1205 ; CHECK-LABEL: test_vmhf:
1206 ; CHECK: vmhf %v24, %v24, %v26
1208 %res = call <4 x i32> @llvm.s390.vmhf(<4 x i32> %a, <4 x i32> %b)
1213 define <16 x i8> @test_vmlhb(<16 x i8> %a, <16 x i8> %b) {
1214 ; CHECK-LABEL: test_vmlhb:
1215 ; CHECK: vmlhb %v24, %v24, %v26
1217 %res = call <16 x i8> @llvm.s390.vmlhb(<16 x i8> %a, <16 x i8> %b)
1222 define <8 x i16> @test_vmlhh(<8 x i16> %a, <8 x i16> %b) {
1223 ; CHECK-LABEL: test_vmlhh:
1224 ; CHECK: vmlhh %v24, %v24, %v26
1226 %res = call <8 x i16> @llvm.s390.vmlhh(<8 x i16> %a, <8 x i16> %b)
1231 define <4 x i32> @test_vmlhf(<4 x i32> %a, <4 x i32> %b) {
1232 ; CHECK-LABEL: test_vmlhf:
1233 ; CHECK: vmlhf %v24, %v24, %v26
1235 %res = call <4 x i32> @llvm.s390.vmlhf(<4 x i32> %a, <4 x i32> %b)
1240 define <8 x i16> @test_vmeb(<16 x i8> %a, <16 x i8> %b) {
1241 ; CHECK-LABEL: test_vmeb:
1242 ; CHECK: vmeb %v24, %v24, %v26
1244 %res = call <8 x i16> @llvm.s390.vmeb(<16 x i8> %a, <16 x i8> %b)
1249 define <4 x i32> @test_vmeh(<8 x i16> %a, <8 x i16> %b) {
1250 ; CHECK-LABEL: test_vmeh:
1251 ; CHECK: vmeh %v24, %v24, %v26
1253 %res = call <4 x i32> @llvm.s390.vmeh(<8 x i16> %a, <8 x i16> %b)
1258 define <2 x i64> @test_vmef(<4 x i32> %a, <4 x i32> %b) {
1259 ; CHECK-LABEL: test_vmef:
1260 ; CHECK: vmef %v24, %v24, %v26
1262 %res = call <2 x i64> @llvm.s390.vmef(<4 x i32> %a, <4 x i32> %b)
1267 define <8 x i16> @test_vmleb(<16 x i8> %a, <16 x i8> %b) {
1268 ; CHECK-LABEL: test_vmleb:
1269 ; CHECK: vmleb %v24, %v24, %v26
1271 %res = call <8 x i16> @llvm.s390.vmleb(<16 x i8> %a, <16 x i8> %b)
1276 define <4 x i32> @test_vmleh(<8 x i16> %a, <8 x i16> %b) {
1277 ; CHECK-LABEL: test_vmleh:
1278 ; CHECK: vmleh %v24, %v24, %v26
1280 %res = call <4 x i32> @llvm.s390.vmleh(<8 x i16> %a, <8 x i16> %b)
1285 define <2 x i64> @test_vmlef(<4 x i32> %a, <4 x i32> %b) {
1286 ; CHECK-LABEL: test_vmlef:
1287 ; CHECK: vmlef %v24, %v24, %v26
1289 %res = call <2 x i64> @llvm.s390.vmlef(<4 x i32> %a, <4 x i32> %b)
1294 define <8 x i16> @test_vmob(<16 x i8> %a, <16 x i8> %b) {
1295 ; CHECK-LABEL: test_vmob:
1296 ; CHECK: vmob %v24, %v24, %v26
1298 %res = call <8 x i16> @llvm.s390.vmob(<16 x i8> %a, <16 x i8> %b)
1303 define <4 x i32> @test_vmoh(<8 x i16> %a, <8 x i16> %b) {
1304 ; CHECK-LABEL: test_vmoh:
1305 ; CHECK: vmoh %v24, %v24, %v26
1307 %res = call <4 x i32> @llvm.s390.vmoh(<8 x i16> %a, <8 x i16> %b)
1312 define <2 x i64> @test_vmof(<4 x i32> %a, <4 x i32> %b) {
1313 ; CHECK-LABEL: test_vmof:
1314 ; CHECK: vmof %v24, %v24, %v26
1316 %res = call <2 x i64> @llvm.s390.vmof(<4 x i32> %a, <4 x i32> %b)
1321 define <8 x i16> @test_vmlob(<16 x i8> %a, <16 x i8> %b) {
1322 ; CHECK-LABEL: test_vmlob:
1323 ; CHECK: vmlob %v24, %v24, %v26
1325 %res = call <8 x i16> @llvm.s390.vmlob(<16 x i8> %a, <16 x i8> %b)
1330 define <4 x i32> @test_vmloh(<8 x i16> %a, <8 x i16> %b) {
1331 ; CHECK-LABEL: test_vmloh:
1332 ; CHECK: vmloh %v24, %v24, %v26
1334 %res = call <4 x i32> @llvm.s390.vmloh(<8 x i16> %a, <8 x i16> %b)
1339 define <2 x i64> @test_vmlof(<4 x i32> %a, <4 x i32> %b) {
1340 ; CHECK-LABEL: test_vmlof:
1341 ; CHECK: vmlof %v24, %v24, %v26
1343 %res = call <2 x i64> @llvm.s390.vmlof(<4 x i32> %a, <4 x i32> %b)
1348 define <16 x i8> @test_verllvb(<16 x i8> %a, <16 x i8> %b) {
1349 ; CHECK-LABEL: test_verllvb:
1350 ; CHECK: verllvb %v24, %v24, %v26
1352 %res = call <16 x i8> @llvm.s390.verllvb(<16 x i8> %a, <16 x i8> %b)
1357 define <8 x i16> @test_verllvh(<8 x i16> %a, <8 x i16> %b) {
1358 ; CHECK-LABEL: test_verllvh:
1359 ; CHECK: verllvh %v24, %v24, %v26
1361 %res = call <8 x i16> @llvm.s390.verllvh(<8 x i16> %a, <8 x i16> %b)
1366 define <4 x i32> @test_verllvf(<4 x i32> %a, <4 x i32> %b) {
1367 ; CHECK-LABEL: test_verllvf:
1368 ; CHECK: verllvf %v24, %v24, %v26
1370 %res = call <4 x i32> @llvm.s390.verllvf(<4 x i32> %a, <4 x i32> %b)
1375 define <2 x i64> @test_verllvg(<2 x i64> %a, <2 x i64> %b) {
1376 ; CHECK-LABEL: test_verllvg:
1377 ; CHECK: verllvg %v24, %v24, %v26
1379 %res = call <2 x i64> @llvm.s390.verllvg(<2 x i64> %a, <2 x i64> %b)
1384 define <16 x i8> @test_verllb(<16 x i8> %a, i32 %b) {
1385 ; CHECK-LABEL: test_verllb:
1386 ; CHECK: verllb %v24, %v24, 0(%r2)
1388 %res = call <16 x i8> @llvm.s390.verllb(<16 x i8> %a, i32 %b)
1393 define <8 x i16> @test_verllh(<8 x i16> %a, i32 %b) {
1394 ; CHECK-LABEL: test_verllh:
1395 ; CHECK: verllh %v24, %v24, 0(%r2)
1397 %res = call <8 x i16> @llvm.s390.verllh(<8 x i16> %a, i32 %b)
1402 define <4 x i32> @test_verllf(<4 x i32> %a, i32 %b) {
1403 ; CHECK-LABEL: test_verllf:
1404 ; CHECK: verllf %v24, %v24, 0(%r2)
1406 %res = call <4 x i32> @llvm.s390.verllf(<4 x i32> %a, i32 %b)
1411 define <2 x i64> @test_verllg(<2 x i64> %a, i32 %b) {
1412 ; CHECK-LABEL: test_verllg:
1413 ; CHECK: verllg %v24, %v24, 0(%r2)
1415 %res = call <2 x i64> @llvm.s390.verllg(<2 x i64> %a, i32 %b)
1419 ; VERLLB with the smallest count.
1420 define <16 x i8> @test_verllb_1(<16 x i8> %a) {
1421 ; CHECK-LABEL: test_verllb_1:
1422 ; CHECK: verllb %v24, %v24, 1
1424 %res = call <16 x i8> @llvm.s390.verllb(<16 x i8> %a, i32 1)
1428 ; VERLLB with the largest count.
1429 define <16 x i8> @test_verllb_4095(<16 x i8> %a) {
1430 ; CHECK-LABEL: test_verllb_4095:
1431 ; CHECK: verllb %v24, %v24, 4095
1433 %res = call <16 x i8> @llvm.s390.verllb(<16 x i8> %a, i32 4095)
1437 ; VERLLB with the largest count + 1.
1438 define <16 x i8> @test_verllb_4096(<16 x i8> %a) {
1439 ; CHECK-LABEL: test_verllb_4096:
1440 ; CHECK: lhi [[REG:%r[1-5]]], 4096
1441 ; CHECK: verllb %v24, %v24, 0([[REG]])
1443 %res = call <16 x i8> @llvm.s390.verllb(<16 x i8> %a, i32 4096)
1448 define <16 x i8> @test_verimb(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
1449 ; CHECK-LABEL: test_verimb:
1450 ; CHECK: verimb %v24, %v26, %v28, 1
1452 %res = call <16 x i8> @llvm.s390.verimb(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c, i32 1)
1457 define <8 x i16> @test_verimh(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c) {
1458 ; CHECK-LABEL: test_verimh:
1459 ; CHECK: verimh %v24, %v26, %v28, 1
1461 %res = call <8 x i16> @llvm.s390.verimh(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c, i32 1)
1466 define <4 x i32> @test_verimf(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
1467 ; CHECK-LABEL: test_verimf:
1468 ; CHECK: verimf %v24, %v26, %v28, 1
1470 %res = call <4 x i32> @llvm.s390.verimf(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c, i32 1)
1475 define <2 x i64> @test_verimg(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) {
1476 ; CHECK-LABEL: test_verimg:
1477 ; CHECK: verimg %v24, %v26, %v28, 1
1479 %res = call <2 x i64> @llvm.s390.verimg(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c, i32 1)
1483 ; VERIMB with a different mask.
1484 define <16 x i8> @test_verimb_254(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
1485 ; CHECK-LABEL: test_verimb_254:
1486 ; CHECK: verimb %v24, %v26, %v28, 254
1488 %res = call <16 x i8> @llvm.s390.verimb(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c, i32 254)
1493 define <16 x i8> @test_vsl(<16 x i8> %a, <16 x i8> %b) {
1494 ; CHECK-LABEL: test_vsl:
1495 ; CHECK: vsl %v24, %v24, %v26
1497 %res = call <16 x i8> @llvm.s390.vsl(<16 x i8> %a, <16 x i8> %b)
1502 define <16 x i8> @test_vslb(<16 x i8> %a, <16 x i8> %b) {
1503 ; CHECK-LABEL: test_vslb:
1504 ; CHECK: vslb %v24, %v24, %v26
1506 %res = call <16 x i8> @llvm.s390.vslb(<16 x i8> %a, <16 x i8> %b)
1511 define <16 x i8> @test_vsra(<16 x i8> %a, <16 x i8> %b) {
1512 ; CHECK-LABEL: test_vsra:
1513 ; CHECK: vsra %v24, %v24, %v26
1515 %res = call <16 x i8> @llvm.s390.vsra(<16 x i8> %a, <16 x i8> %b)
1520 define <16 x i8> @test_vsrab(<16 x i8> %a, <16 x i8> %b) {
1521 ; CHECK-LABEL: test_vsrab:
1522 ; CHECK: vsrab %v24, %v24, %v26
1524 %res = call <16 x i8> @llvm.s390.vsrab(<16 x i8> %a, <16 x i8> %b)
1529 define <16 x i8> @test_vsrl(<16 x i8> %a, <16 x i8> %b) {
1530 ; CHECK-LABEL: test_vsrl:
1531 ; CHECK: vsrl %v24, %v24, %v26
1533 %res = call <16 x i8> @llvm.s390.vsrl(<16 x i8> %a, <16 x i8> %b)
1538 define <16 x i8> @test_vsrlb(<16 x i8> %a, <16 x i8> %b) {
1539 ; CHECK-LABEL: test_vsrlb:
1540 ; CHECK: vsrlb %v24, %v24, %v26
1542 %res = call <16 x i8> @llvm.s390.vsrlb(<16 x i8> %a, <16 x i8> %b)
1546 ; VSLDB with the minimum useful value.
1547 define <16 x i8> @test_vsldb_1(<16 x i8> %a, <16 x i8> %b) {
1548 ; CHECK-LABEL: test_vsldb_1:
1549 ; CHECK: vsldb %v24, %v24, %v26, 1
1551 %res = call <16 x i8> @llvm.s390.vsldb(<16 x i8> %a, <16 x i8> %b, i32 1)
1555 ; VSLDB with the maximum value.
1556 define <16 x i8> @test_vsldb_15(<16 x i8> %a, <16 x i8> %b) {
1557 ; CHECK-LABEL: test_vsldb_15:
1558 ; CHECK: vsldb %v24, %v24, %v26, 15
1560 %res = call <16 x i8> @llvm.s390.vsldb(<16 x i8> %a, <16 x i8> %b, i32 15)
1565 define <16 x i8> @test_vscbib(<16 x i8> %a, <16 x i8> %b) {
1566 ; CHECK-LABEL: test_vscbib:
1567 ; CHECK: vscbib %v24, %v24, %v26
1569 %res = call <16 x i8> @llvm.s390.vscbib(<16 x i8> %a, <16 x i8> %b)
1574 define <8 x i16> @test_vscbih(<8 x i16> %a, <8 x i16> %b) {
1575 ; CHECK-LABEL: test_vscbih:
1576 ; CHECK: vscbih %v24, %v24, %v26
1578 %res = call <8 x i16> @llvm.s390.vscbih(<8 x i16> %a, <8 x i16> %b)
1583 define <4 x i32> @test_vscbif(<4 x i32> %a, <4 x i32> %b) {
1584 ; CHECK-LABEL: test_vscbif:
1585 ; CHECK: vscbif %v24, %v24, %v26
1587 %res = call <4 x i32> @llvm.s390.vscbif(<4 x i32> %a, <4 x i32> %b)
1592 define <2 x i64> @test_vscbig(<2 x i64> %a, <2 x i64> %b) {
1593 ; CHECK-LABEL: test_vscbig:
1594 ; CHECK: vscbig %v24, %v24, %v26
1596 %res = call <2 x i64> @llvm.s390.vscbig(<2 x i64> %a, <2 x i64> %b)
1601 define <16 x i8> @test_vsq(<16 x i8> %a, <16 x i8> %b) {
1602 ; CHECK-LABEL: test_vsq:
1603 ; CHECK: vsq %v24, %v24, %v26
1605 %res = call <16 x i8> @llvm.s390.vsq(<16 x i8> %a, <16 x i8> %b)
1610 define <16 x i8> @test_vsbiq(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
1611 ; CHECK-LABEL: test_vsbiq:
1612 ; CHECK: vsbiq %v24, %v24, %v26, %v28
1614 %res = call <16 x i8> @llvm.s390.vsbiq(<16 x i8> %a, <16 x i8> %b,
1620 define <16 x i8> @test_vscbiq(<16 x i8> %a, <16 x i8> %b) {
1621 ; CHECK-LABEL: test_vscbiq:
1622 ; CHECK: vscbiq %v24, %v24, %v26
1624 %res = call <16 x i8> @llvm.s390.vscbiq(<16 x i8> %a, <16 x i8> %b)
1629 define <16 x i8> @test_vsbcbiq(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
1630 ; CHECK-LABEL: test_vsbcbiq:
1631 ; CHECK: vsbcbiq %v24, %v24, %v26, %v28
1633 %res = call <16 x i8> @llvm.s390.vsbcbiq(<16 x i8> %a, <16 x i8> %b,
1639 define <4 x i32> @test_vsumb(<16 x i8> %a, <16 x i8> %b) {
1640 ; CHECK-LABEL: test_vsumb:
1641 ; CHECK: vsumb %v24, %v24, %v26
1643 %res = call <4 x i32> @llvm.s390.vsumb(<16 x i8> %a, <16 x i8> %b)
1648 define <4 x i32> @test_vsumh(<8 x i16> %a, <8 x i16> %b) {
1649 ; CHECK-LABEL: test_vsumh:
1650 ; CHECK: vsumh %v24, %v24, %v26
1652 %res = call <4 x i32> @llvm.s390.vsumh(<8 x i16> %a, <8 x i16> %b)
1657 define <2 x i64> @test_vsumgh(<8 x i16> %a, <8 x i16> %b) {
1658 ; CHECK-LABEL: test_vsumgh:
1659 ; CHECK: vsumgh %v24, %v24, %v26
1661 %res = call <2 x i64> @llvm.s390.vsumgh(<8 x i16> %a, <8 x i16> %b)
1666 define <2 x i64> @test_vsumgf(<4 x i32> %a, <4 x i32> %b) {
1667 ; CHECK-LABEL: test_vsumgf:
1668 ; CHECK: vsumgf %v24, %v24, %v26
1670 %res = call <2 x i64> @llvm.s390.vsumgf(<4 x i32> %a, <4 x i32> %b)
1675 define <16 x i8> @test_vsumqf(<4 x i32> %a, <4 x i32> %b) {
1676 ; CHECK-LABEL: test_vsumqf:
1677 ; CHECK: vsumqf %v24, %v24, %v26
1679 %res = call <16 x i8> @llvm.s390.vsumqf(<4 x i32> %a, <4 x i32> %b)
1684 define <16 x i8> @test_vsumqg(<2 x i64> %a, <2 x i64> %b) {
1685 ; CHECK-LABEL: test_vsumqg:
1686 ; CHECK: vsumqg %v24, %v24, %v26
1688 %res = call <16 x i8> @llvm.s390.vsumqg(<2 x i64> %a, <2 x i64> %b)
1692 ; VTM with no processing of the result.
1693 define i32 @test_vtm(<16 x i8> %a, <16 x i8> %b) {
1694 ; CHECK-LABEL: test_vtm:
1695 ; CHECK: vtm %v24, %v26
1697 ; CHECK: srl %r2, 28
1699 %res = call i32 @llvm.s390.vtm(<16 x i8> %a, <16 x i8> %b)
1703 ; VTM, storing to %ptr if all bits are set.
1704 define void @test_vtm_all_store(<16 x i8> %a, <16 x i8> %b, i32 *%ptr) {
1705 ; CHECK-LABEL: test_vtm_all_store:
1707 ; CHECK: vtm %v24, %v26
1708 ; CHECK-NEXT: {{jno|jle}} {{\.L*}}
1709 ; CHECK: mvhi 0(%r2), 0
1711 %res = call i32 @llvm.s390.vtm(<16 x i8> %a, <16 x i8> %b)
1712 %cmp = icmp sge i32 %res, 3
1713 br i1 %cmp, label %store, label %exit
1716 store i32 0, i32 *%ptr
1723 ; VCEQBS with no processing of the result.
1724 define i32 @test_vceqbs(<16 x i8> %a, <16 x i8> %b) {
1725 ; CHECK-LABEL: test_vceqbs:
1726 ; CHECK: vceqbs {{%v[0-9]+}}, %v24, %v26
1728 ; CHECK: srl %r2, 28
1730 %call = call {<16 x i8>, i32} @llvm.s390.vceqbs(<16 x i8> %a, <16 x i8> %b)
1731 %res = extractvalue {<16 x i8>, i32} %call, 1
1735 ; VCEQBS, returning 1 if any elements are equal (CC != 3).
1736 define i32 @test_vceqbs_any_bool(<16 x i8> %a, <16 x i8> %b) {
1737 ; CHECK-LABEL: test_vceqbs_any_bool:
1738 ; CHECK: vceqbs {{%v[0-9]+}}, %v24, %v26
1740 ; CHECK: afi %r2, -536870912
1741 ; CHECK: srl %r2, 31
1743 %call = call {<16 x i8>, i32} @llvm.s390.vceqbs(<16 x i8> %a, <16 x i8> %b)
1744 %res = extractvalue {<16 x i8>, i32} %call, 1
1745 %cmp = icmp ne i32 %res, 3
1746 %ext = zext i1 %cmp to i32
1750 ; VCEQBS, storing to %ptr if any elements are equal.
1751 define <16 x i8> @test_vceqbs_any_store(<16 x i8> %a, <16 x i8> %b, i32 *%ptr) {
1752 ; CHECK-LABEL: test_vceqbs_any_store:
1754 ; CHECK: vceqbs %v24, %v24, %v26
1755 ; CHECK-NEXT: {{jo|jnle}} {{\.L*}}
1756 ; CHECK: mvhi 0(%r2), 0
1758 %call = call {<16 x i8>, i32} @llvm.s390.vceqbs(<16 x i8> %a, <16 x i8> %b)
1759 %res = extractvalue {<16 x i8>, i32} %call, 0
1760 %cc = extractvalue {<16 x i8>, i32} %call, 1
1761 %cmp = icmp ule i32 %cc, 2
1762 br i1 %cmp, label %store, label %exit
1765 store i32 0, i32 *%ptr
1772 ; VCEQHS with no processing of the result.
1773 define i32 @test_vceqhs(<8 x i16> %a, <8 x i16> %b) {
1774 ; CHECK-LABEL: test_vceqhs:
1775 ; CHECK: vceqhs {{%v[0-9]+}}, %v24, %v26
1777 ; CHECK: srl %r2, 28
1779 %call = call {<8 x i16>, i32} @llvm.s390.vceqhs(<8 x i16> %a, <8 x i16> %b)
1780 %res = extractvalue {<8 x i16>, i32} %call, 1
1784 ; VCEQHS, returning 1 if not all elements are equal.
1785 define i32 @test_vceqhs_notall_bool(<8 x i16> %a, <8 x i16> %b) {
1786 ; CHECK-LABEL: test_vceqhs_notall_bool:
1787 ; CHECK: vceqhs {{%v[0-9]+}}, %v24, %v26
1788 ; CHECK: ipm [[REG:%r[0-5]]]
1789 ; CHECK: risblg %r2, [[REG]], 31, 159, 36
1791 %call = call {<8 x i16>, i32} @llvm.s390.vceqhs(<8 x i16> %a, <8 x i16> %b)
1792 %res = extractvalue {<8 x i16>, i32} %call, 1
1793 %cmp = icmp sge i32 %res, 1
1794 %ext = zext i1 %cmp to i32
1798 ; VCEQHS, storing to %ptr if not all elements are equal.
1799 define <8 x i16> @test_vceqhs_notall_store(<8 x i16> %a, <8 x i16> %b,
1801 ; CHECK-LABEL: test_vceqhs_notall_store:
1803 ; CHECK: vceqhs %v24, %v24, %v26
1804 ; CHECK-NEXT: {{jhe|je}} {{\.L*}}
1805 ; CHECK: mvhi 0(%r2), 0
1807 %call = call {<8 x i16>, i32} @llvm.s390.vceqhs(<8 x i16> %a, <8 x i16> %b)
1808 %res = extractvalue {<8 x i16>, i32} %call, 0
1809 %cc = extractvalue {<8 x i16>, i32} %call, 1
1810 %cmp = icmp ugt i32 %cc, 0
1811 br i1 %cmp, label %store, label %exit
1814 store i32 0, i32 *%ptr
1821 ; VCEQFS with no processing of the result.
1822 define i32 @test_vceqfs(<4 x i32> %a, <4 x i32> %b) {
1823 ; CHECK-LABEL: test_vceqfs:
1824 ; CHECK: vceqfs {{%v[0-9]+}}, %v24, %v26
1826 ; CHECK: srl %r2, 28
1828 %call = call {<4 x i32>, i32} @llvm.s390.vceqfs(<4 x i32> %a, <4 x i32> %b)
1829 %res = extractvalue {<4 x i32>, i32} %call, 1
1833 ; VCEQFS, returning 1 if no elements are equal.
1834 define i32 @test_vceqfs_none_bool(<4 x i32> %a, <4 x i32> %b) {
1835 ; CHECK-LABEL: test_vceqfs_none_bool:
1836 ; CHECK: vceqfs {{%v[0-9]+}}, %v24, %v26
1837 ; CHECK: ipm [[REG:%r[0-5]]]
1838 ; CHECK: risblg %r2, [[REG]], 31, 159, 35
1840 %call = call {<4 x i32>, i32} @llvm.s390.vceqfs(<4 x i32> %a, <4 x i32> %b)
1841 %res = extractvalue {<4 x i32>, i32} %call, 1
1842 %cmp = icmp eq i32 %res, 3
1843 %ext = zext i1 %cmp to i32
1847 ; VCEQFS, storing to %ptr if no elements are equal.
1848 define <4 x i32> @test_vceqfs_none_store(<4 x i32> %a, <4 x i32> %b,
1850 ; CHECK-LABEL: test_vceqfs_none_store:
1852 ; CHECK: vceqfs %v24, %v24, %v26
1853 ; CHECK-NEXT: {{jno|jle}} {{\.L*}}
1854 ; CHECK: mvhi 0(%r2), 0
1856 %call = call {<4 x i32>, i32} @llvm.s390.vceqfs(<4 x i32> %a, <4 x i32> %b)
1857 %res = extractvalue {<4 x i32>, i32} %call, 0
1858 %cc = extractvalue {<4 x i32>, i32} %call, 1
1859 %cmp = icmp uge i32 %cc, 3
1860 br i1 %cmp, label %store, label %exit
1863 store i32 0, i32 *%ptr
1870 ; VCEQGS with no processing of the result.
1871 define i32 @test_vceqgs(<2 x i64> %a, <2 x i64> %b) {
1872 ; CHECK-LABEL: test_vceqgs:
1873 ; CHECK: vceqgs {{%v[0-9]+}}, %v24, %v26
1875 ; CHECK: srl %r2, 28
1877 %call = call {<2 x i64>, i32} @llvm.s390.vceqgs(<2 x i64> %a, <2 x i64> %b)
1878 %res = extractvalue {<2 x i64>, i32} %call, 1
1882 ; VCEQGS returning 1 if all elements are equal (CC == 0).
1883 define i32 @test_vceqgs_all_bool(<2 x i64> %a, <2 x i64> %b) {
1884 ; CHECK-LABEL: test_vceqgs_all_bool:
1885 ; CHECK: vceqgs {{%v[0-9]+}}, %v24, %v26
1887 ; CHECK: afi %r2, -268435456
1888 ; CHECK: srl %r2, 31
1890 %call = call {<2 x i64>, i32} @llvm.s390.vceqgs(<2 x i64> %a, <2 x i64> %b)
1891 %res = extractvalue {<2 x i64>, i32} %call, 1
1892 %cmp = icmp ult i32 %res, 1
1893 %ext = zext i1 %cmp to i32
1897 ; VCEQGS, storing to %ptr if all elements are equal.
1898 define <2 x i64> @test_vceqgs_all_store(<2 x i64> %a, <2 x i64> %b, i32 *%ptr) {
1899 ; CHECK-LABEL: test_vceqgs_all_store:
1901 ; CHECK: vceqgs %v24, %v24, %v26
1902 ; CHECK-NEXT: {{jnhe|jne}} {{\.L*}}
1903 ; CHECK: mvhi 0(%r2), 0
1905 %call = call {<2 x i64>, i32} @llvm.s390.vceqgs(<2 x i64> %a, <2 x i64> %b)
1906 %res = extractvalue {<2 x i64>, i32} %call, 0
1907 %cc = extractvalue {<2 x i64>, i32} %call, 1
1908 %cmp = icmp sle i32 %cc, 0
1909 br i1 %cmp, label %store, label %exit
1912 store i32 0, i32 *%ptr
1919 ; VCHBS with no processing of the result.
1920 define i32 @test_vchbs(<16 x i8> %a, <16 x i8> %b) {
1921 ; CHECK-LABEL: test_vchbs:
1922 ; CHECK: vchbs {{%v[0-9]+}}, %v24, %v26
1924 ; CHECK: srl %r2, 28
1926 %call = call {<16 x i8>, i32} @llvm.s390.vchbs(<16 x i8> %a, <16 x i8> %b)
1927 %res = extractvalue {<16 x i8>, i32} %call, 1
1931 ; VCHBS, returning 1 if any elements are higher (CC != 3).
1932 define i32 @test_vchbs_any_bool(<16 x i8> %a, <16 x i8> %b) {
1933 ; CHECK-LABEL: test_vchbs_any_bool:
1934 ; CHECK: vchbs {{%v[0-9]+}}, %v24, %v26
1936 ; CHECK: afi %r2, -536870912
1937 ; CHECK: srl %r2, 31
1939 %call = call {<16 x i8>, i32} @llvm.s390.vchbs(<16 x i8> %a, <16 x i8> %b)
1940 %res = extractvalue {<16 x i8>, i32} %call, 1
1941 %cmp = icmp ne i32 %res, 3
1942 %ext = zext i1 %cmp to i32
1946 ; VCHBS, storing to %ptr if any elements are higher.
1947 define <16 x i8> @test_vchbs_any_store(<16 x i8> %a, <16 x i8> %b, i32 *%ptr) {
1948 ; CHECK-LABEL: test_vchbs_any_store:
1950 ; CHECK: vchbs %v24, %v24, %v26
1951 ; CHECK-NEXT: {{jo|jnle}} {{\.L*}}
1952 ; CHECK: mvhi 0(%r2), 0
1954 %call = call {<16 x i8>, i32} @llvm.s390.vchbs(<16 x i8> %a, <16 x i8> %b)
1955 %res = extractvalue {<16 x i8>, i32} %call, 0
1956 %cc = extractvalue {<16 x i8>, i32} %call, 1
1957 %cmp = icmp ule i32 %cc, 2
1958 br i1 %cmp, label %store, label %exit
1961 store i32 0, i32 *%ptr
1968 ; VCHHS with no processing of the result.
1969 define i32 @test_vchhs(<8 x i16> %a, <8 x i16> %b) {
1970 ; CHECK-LABEL: test_vchhs:
1971 ; CHECK: vchhs {{%v[0-9]+}}, %v24, %v26
1973 ; CHECK: srl %r2, 28
1975 %call = call {<8 x i16>, i32} @llvm.s390.vchhs(<8 x i16> %a, <8 x i16> %b)
1976 %res = extractvalue {<8 x i16>, i32} %call, 1
1980 ; VCHHS, returning 1 if not all elements are higher.
1981 define i32 @test_vchhs_notall_bool(<8 x i16> %a, <8 x i16> %b) {
1982 ; CHECK-LABEL: test_vchhs_notall_bool:
1983 ; CHECK: vchhs {{%v[0-9]+}}, %v24, %v26
1984 ; CHECK: ipm [[REG:%r[0-5]]]
1985 ; CHECK: risblg %r2, [[REG]], 31, 159, 36
1987 %call = call {<8 x i16>, i32} @llvm.s390.vchhs(<8 x i16> %a, <8 x i16> %b)
1988 %res = extractvalue {<8 x i16>, i32} %call, 1
1989 %cmp = icmp sge i32 %res, 1
1990 %ext = zext i1 %cmp to i32
1994 ; VCHHS, storing to %ptr if not all elements are higher.
1995 define <8 x i16> @test_vchhs_notall_store(<8 x i16> %a, <8 x i16> %b,
1997 ; CHECK-LABEL: test_vchhs_notall_store:
1999 ; CHECK: vchhs %v24, %v24, %v26
2000 ; CHECK-NEXT: {{jhe|je}} {{\.L*}}
2001 ; CHECK: mvhi 0(%r2), 0
2003 %call = call {<8 x i16>, i32} @llvm.s390.vchhs(<8 x i16> %a, <8 x i16> %b)
2004 %res = extractvalue {<8 x i16>, i32} %call, 0
2005 %cc = extractvalue {<8 x i16>, i32} %call, 1
2006 %cmp = icmp ugt i32 %cc, 0
2007 br i1 %cmp, label %store, label %exit
2010 store i32 0, i32 *%ptr
2017 ; VCHFS with no processing of the result.
2018 define i32 @test_vchfs(<4 x i32> %a, <4 x i32> %b) {
2019 ; CHECK-LABEL: test_vchfs:
2020 ; CHECK: vchfs {{%v[0-9]+}}, %v24, %v26
2022 ; CHECK: srl %r2, 28
2024 %call = call {<4 x i32>, i32} @llvm.s390.vchfs(<4 x i32> %a, <4 x i32> %b)
2025 %res = extractvalue {<4 x i32>, i32} %call, 1
2029 ; VCHFS, returning 1 if no elements are higher.
2030 define i32 @test_vchfs_none_bool(<4 x i32> %a, <4 x i32> %b) {
2031 ; CHECK-LABEL: test_vchfs_none_bool:
2032 ; CHECK: vchfs {{%v[0-9]+}}, %v24, %v26
2033 ; CHECK: ipm [[REG:%r[0-5]]]
2034 ; CHECK: risblg %r2, [[REG]], 31, 159, 35
2036 %call = call {<4 x i32>, i32} @llvm.s390.vchfs(<4 x i32> %a, <4 x i32> %b)
2037 %res = extractvalue {<4 x i32>, i32} %call, 1
2038 %cmp = icmp eq i32 %res, 3
2039 %ext = zext i1 %cmp to i32
2043 ; VCHFS, storing to %ptr if no elements are higher.
2044 define <4 x i32> @test_vchfs_none_store(<4 x i32> %a, <4 x i32> %b, i32 *%ptr) {
2045 ; CHECK-LABEL: test_vchfs_none_store:
2047 ; CHECK: vchfs %v24, %v24, %v26
2048 ; CHECK-NEXT: {{jno|jle}} {{\.L*}}
2049 ; CHECK: mvhi 0(%r2), 0
2051 %call = call {<4 x i32>, i32} @llvm.s390.vchfs(<4 x i32> %a, <4 x i32> %b)
2052 %res = extractvalue {<4 x i32>, i32} %call, 0
2053 %cc = extractvalue {<4 x i32>, i32} %call, 1
2054 %cmp = icmp uge i32 %cc, 3
2055 br i1 %cmp, label %store, label %exit
2058 store i32 0, i32 *%ptr
2065 ; VCHGS with no processing of the result.
2066 define i32 @test_vchgs(<2 x i64> %a, <2 x i64> %b) {
2067 ; CHECK-LABEL: test_vchgs:
2068 ; CHECK: vchgs {{%v[0-9]+}}, %v24, %v26
2070 ; CHECK: srl %r2, 28
2072 %call = call {<2 x i64>, i32} @llvm.s390.vchgs(<2 x i64> %a, <2 x i64> %b)
2073 %res = extractvalue {<2 x i64>, i32} %call, 1
2077 ; VCHGS returning 1 if all elements are higher (CC == 0).
2078 define i32 @test_vchgs_all_bool(<2 x i64> %a, <2 x i64> %b) {
2079 ; CHECK-LABEL: test_vchgs_all_bool:
2080 ; CHECK: vchgs {{%v[0-9]+}}, %v24, %v26
2082 ; CHECK: afi %r2, -268435456
2083 ; CHECK: srl %r2, 31
2085 %call = call {<2 x i64>, i32} @llvm.s390.vchgs(<2 x i64> %a, <2 x i64> %b)
2086 %res = extractvalue {<2 x i64>, i32} %call, 1
2087 %cmp = icmp ult i32 %res, 1
2088 %ext = zext i1 %cmp to i32
2092 ; VCHGS, storing to %ptr if all elements are higher.
2093 define <2 x i64> @test_vchgs_all_store(<2 x i64> %a, <2 x i64> %b, i32 *%ptr) {
2094 ; CHECK-LABEL: test_vchgs_all_store:
2096 ; CHECK: vchgs %v24, %v24, %v26
2097 ; CHECK-NEXT: {{jnhe|jne}} {{\.L*}}
2098 ; CHECK: mvhi 0(%r2), 0
2100 %call = call {<2 x i64>, i32} @llvm.s390.vchgs(<2 x i64> %a, <2 x i64> %b)
2101 %res = extractvalue {<2 x i64>, i32} %call, 0
2102 %cc = extractvalue {<2 x i64>, i32} %call, 1
2103 %cmp = icmp sle i32 %cc, 0
2104 br i1 %cmp, label %store, label %exit
2107 store i32 0, i32 *%ptr
2114 ; VCHLBS with no processing of the result.
2115 define i32 @test_vchlbs(<16 x i8> %a, <16 x i8> %b) {
2116 ; CHECK-LABEL: test_vchlbs:
2117 ; CHECK: vchlbs {{%v[0-9]+}}, %v24, %v26
2119 ; CHECK: srl %r2, 28
2121 %call = call {<16 x i8>, i32} @llvm.s390.vchlbs(<16 x i8> %a, <16 x i8> %b)
2122 %res = extractvalue {<16 x i8>, i32} %call, 1
2126 ; VCHLBS, returning 1 if any elements are higher (CC != 3).
2127 define i32 @test_vchlbs_any_bool(<16 x i8> %a, <16 x i8> %b) {
2128 ; CHECK-LABEL: test_vchlbs_any_bool:
2129 ; CHECK: vchlbs {{%v[0-9]+}}, %v24, %v26
2131 ; CHECK: afi %r2, -536870912
2132 ; CHECK: srl %r2, 31
2134 %call = call {<16 x i8>, i32} @llvm.s390.vchlbs(<16 x i8> %a, <16 x i8> %b)
2135 %res = extractvalue {<16 x i8>, i32} %call, 1
2136 %cmp = icmp ne i32 %res, 3
2137 %ext = zext i1 %cmp to i32
2141 ; VCHLBS, storing to %ptr if any elements are higher.
2142 define <16 x i8> @test_vchlbs_any_store(<16 x i8> %a, <16 x i8> %b, i32 *%ptr) {
2143 ; CHECK-LABEL: test_vchlbs_any_store:
2145 ; CHECK: vchlbs %v24, %v24, %v26
2146 ; CHECK-NEXT: {{jo|jnle}} {{\.L*}}
2147 ; CHECK: mvhi 0(%r2), 0
2149 %call = call {<16 x i8>, i32} @llvm.s390.vchlbs(<16 x i8> %a, <16 x i8> %b)
2150 %res = extractvalue {<16 x i8>, i32} %call, 0
2151 %cc = extractvalue {<16 x i8>, i32} %call, 1
2152 %cmp = icmp sle i32 %cc, 2
2153 br i1 %cmp, label %store, label %exit
2156 store i32 0, i32 *%ptr
2163 ; VCHLHS with no processing of the result.
2164 define i32 @test_vchlhs(<8 x i16> %a, <8 x i16> %b) {
2165 ; CHECK-LABEL: test_vchlhs:
2166 ; CHECK: vchlhs {{%v[0-9]+}}, %v24, %v26
2168 ; CHECK: srl %r2, 28
2170 %call = call {<8 x i16>, i32} @llvm.s390.vchlhs(<8 x i16> %a, <8 x i16> %b)
2171 %res = extractvalue {<8 x i16>, i32} %call, 1
2175 ; VCHLHS, returning 1 if not all elements are higher.
2176 define i32 @test_vchlhs_notall_bool(<8 x i16> %a, <8 x i16> %b) {
2177 ; CHECK-LABEL: test_vchlhs_notall_bool:
2178 ; CHECK: vchlhs {{%v[0-9]+}}, %v24, %v26
2179 ; CHECK: ipm [[REG:%r[0-5]]]
2180 ; CHECK: risblg %r2, [[REG]], 31, 159, 36
2182 %call = call {<8 x i16>, i32} @llvm.s390.vchlhs(<8 x i16> %a, <8 x i16> %b)
2183 %res = extractvalue {<8 x i16>, i32} %call, 1
2184 %cmp = icmp uge i32 %res, 1
2185 %ext = zext i1 %cmp to i32
2189 ; VCHLHS, storing to %ptr if not all elements are higher.
2190 define <8 x i16> @test_vchlhs_notall_store(<8 x i16> %a, <8 x i16> %b,
2192 ; CHECK-LABEL: test_vchlhs_notall_store:
2194 ; CHECK: vchlhs %v24, %v24, %v26
2195 ; CHECK-NEXT: {{jhe|je}} {{\.L*}}
2196 ; CHECK: mvhi 0(%r2), 0
2198 %call = call {<8 x i16>, i32} @llvm.s390.vchlhs(<8 x i16> %a, <8 x i16> %b)
2199 %res = extractvalue {<8 x i16>, i32} %call, 0
2200 %cc = extractvalue {<8 x i16>, i32} %call, 1
2201 %cmp = icmp sgt i32 %cc, 0
2202 br i1 %cmp, label %store, label %exit
2205 store i32 0, i32 *%ptr
2212 ; VCHLFS with no processing of the result.
2213 define i32 @test_vchlfs(<4 x i32> %a, <4 x i32> %b) {
2214 ; CHECK-LABEL: test_vchlfs:
2215 ; CHECK: vchlfs {{%v[0-9]+}}, %v24, %v26
2217 ; CHECK: srl %r2, 28
2219 %call = call {<4 x i32>, i32} @llvm.s390.vchlfs(<4 x i32> %a, <4 x i32> %b)
2220 %res = extractvalue {<4 x i32>, i32} %call, 1
2224 ; VCHLFS, returning 1 if no elements are higher.
2225 define i32 @test_vchlfs_none_bool(<4 x i32> %a, <4 x i32> %b) {
2226 ; CHECK-LABEL: test_vchlfs_none_bool:
2227 ; CHECK: vchlfs {{%v[0-9]+}}, %v24, %v26
2228 ; CHECK: ipm [[REG:%r[0-5]]]
2229 ; CHECK: risblg %r2, [[REG]], 31, 159, 35
2231 %call = call {<4 x i32>, i32} @llvm.s390.vchlfs(<4 x i32> %a, <4 x i32> %b)
2232 %res = extractvalue {<4 x i32>, i32} %call, 1
2233 %cmp = icmp eq i32 %res, 3
2234 %ext = zext i1 %cmp to i32
2238 ; VCHLFS, storing to %ptr if no elements are higher.
2239 define <4 x i32> @test_vchlfs_none_store(<4 x i32> %a, <4 x i32> %b,
2241 ; CHECK-LABEL: test_vchlfs_none_store:
2243 ; CHECK: vchlfs %v24, %v24, %v26
2244 ; CHECK-NEXT: {{jno|jle}} {{\.L*}}
2245 ; CHECK: mvhi 0(%r2), 0
2247 %call = call {<4 x i32>, i32} @llvm.s390.vchlfs(<4 x i32> %a, <4 x i32> %b)
2248 %res = extractvalue {<4 x i32>, i32} %call, 0
2249 %cc = extractvalue {<4 x i32>, i32} %call, 1
2250 %cmp = icmp sge i32 %cc, 3
2251 br i1 %cmp, label %store, label %exit
2254 store i32 0, i32 *%ptr
2261 ; VCHLGS with no processing of the result.
2262 define i32 @test_vchlgs(<2 x i64> %a, <2 x i64> %b) {
2263 ; CHECK-LABEL: test_vchlgs:
2264 ; CHECK: vchlgs {{%v[0-9]+}}, %v24, %v26
2266 ; CHECK: srl %r2, 28
2268 %call = call {<2 x i64>, i32} @llvm.s390.vchlgs(<2 x i64> %a, <2 x i64> %b)
2269 %res = extractvalue {<2 x i64>, i32} %call, 1
2273 ; VCHLGS returning 1 if all elements are higher (CC == 0).
2274 define i32 @test_vchlgs_all_bool(<2 x i64> %a, <2 x i64> %b) {
2275 ; CHECK-LABEL: test_vchlgs_all_bool:
2276 ; CHECK: vchlgs {{%v[0-9]+}}, %v24, %v26
2278 ; CHECK: afi %r2, -268435456
2279 ; CHECK: srl %r2, 31
2281 %call = call {<2 x i64>, i32} @llvm.s390.vchlgs(<2 x i64> %a, <2 x i64> %b)
2282 %res = extractvalue {<2 x i64>, i32} %call, 1
2283 %cmp = icmp slt i32 %res, 1
2284 %ext = zext i1 %cmp to i32
2288 ; VCHLGS, storing to %ptr if all elements are higher.
2289 define <2 x i64> @test_vchlgs_all_store(<2 x i64> %a, <2 x i64> %b, i32 *%ptr) {
2290 ; CHECK-LABEL: test_vchlgs_all_store:
2292 ; CHECK: vchlgs %v24, %v24, %v26
2293 ; CHECK-NEXT: {{jnhe|jne}} {{\.L*}}
2294 ; CHECK: mvhi 0(%r2), 0
2296 %call = call {<2 x i64>, i32} @llvm.s390.vchlgs(<2 x i64> %a, <2 x i64> %b)
2297 %res = extractvalue {<2 x i64>, i32} %call, 0
2298 %cc = extractvalue {<2 x i64>, i32} %call, 1
2299 %cmp = icmp ule i32 %cc, 0
2300 br i1 %cmp, label %store, label %exit
2303 store i32 0, i32 *%ptr
2310 ; VFAEB with !IN !RT.
2311 define <16 x i8> @test_vfaeb_0(<16 x i8> %a, <16 x i8> %b) {
2312 ; CHECK-LABEL: test_vfaeb_0:
2313 ; CHECK: vfaeb %v24, %v24, %v26, 0
2315 %res = call <16 x i8> @llvm.s390.vfaeb(<16 x i8> %a, <16 x i8> %b, i32 0)
2319 ; VFAEB with !IN RT.
2320 define <16 x i8> @test_vfaeb_4(<16 x i8> %a, <16 x i8> %b) {
2321 ; CHECK-LABEL: test_vfaeb_4:
2322 ; CHECK: vfaeb %v24, %v24, %v26, 4
2324 %res = call <16 x i8> @llvm.s390.vfaeb(<16 x i8> %a, <16 x i8> %b, i32 4)
2328 ; VFAEB with IN !RT.
2329 define <16 x i8> @test_vfaeb_8(<16 x i8> %a, <16 x i8> %b) {
2330 ; CHECK-LABEL: test_vfaeb_8:
2331 ; CHECK: vfaeb %v24, %v24, %v26, 8
2333 %res = call <16 x i8> @llvm.s390.vfaeb(<16 x i8> %a, <16 x i8> %b, i32 8)
2338 define <16 x i8> @test_vfaeb_12(<16 x i8> %a, <16 x i8> %b) {
2339 ; CHECK-LABEL: test_vfaeb_12:
2340 ; CHECK: vfaeb %v24, %v24, %v26, 12
2342 %res = call <16 x i8> @llvm.s390.vfaeb(<16 x i8> %a, <16 x i8> %b, i32 12)
2346 ; VFAEB with CS -- should be ignored.
2347 define <16 x i8> @test_vfaeb_1(<16 x i8> %a, <16 x i8> %b) {
2348 ; CHECK-LABEL: test_vfaeb_1:
2349 ; CHECK: vfaeb %v24, %v24, %v26, 0
2351 %res = call <16 x i8> @llvm.s390.vfaeb(<16 x i8> %a, <16 x i8> %b, i32 1)
2356 define <8 x i16> @test_vfaeh(<8 x i16> %a, <8 x i16> %b) {
2357 ; CHECK-LABEL: test_vfaeh:
2358 ; CHECK: vfaeh %v24, %v24, %v26, 4
2360 %res = call <8 x i16> @llvm.s390.vfaeh(<8 x i16> %a, <8 x i16> %b, i32 4)
2365 define <4 x i32> @test_vfaef(<4 x i32> %a, <4 x i32> %b) {
2366 ; CHECK-LABEL: test_vfaef:
2367 ; CHECK: vfaef %v24, %v24, %v26, 8
2369 %res = call <4 x i32> @llvm.s390.vfaef(<4 x i32> %a, <4 x i32> %b, i32 8)
2374 define <16 x i8> @test_vfaebs(<16 x i8> %a, <16 x i8> %b, i32 *%ccptr) {
2375 ; CHECK-LABEL: test_vfaebs:
2376 ; CHECK: vfaebs %v24, %v24, %v26, 0
2377 ; CHECK: ipm [[REG:%r[0-5]]]
2378 ; CHECK: srl [[REG]], 28
2379 ; CHECK: st [[REG]], 0(%r2)
2381 %call = call {<16 x i8>, i32} @llvm.s390.vfaebs(<16 x i8> %a, <16 x i8> %b,
2383 %res = extractvalue {<16 x i8>, i32} %call, 0
2384 %cc = extractvalue {<16 x i8>, i32} %call, 1
2385 store i32 %cc, i32 *%ccptr
2390 define <8 x i16> @test_vfaehs(<8 x i16> %a, <8 x i16> %b, i32 *%ccptr) {
2391 ; CHECK-LABEL: test_vfaehs:
2392 ; CHECK: vfaehs %v24, %v24, %v26, 4
2393 ; CHECK: ipm [[REG:%r[0-5]]]
2394 ; CHECK: srl [[REG]], 28
2395 ; CHECK: st [[REG]], 0(%r2)
2397 %call = call {<8 x i16>, i32} @llvm.s390.vfaehs(<8 x i16> %a, <8 x i16> %b,
2399 %res = extractvalue {<8 x i16>, i32} %call, 0
2400 %cc = extractvalue {<8 x i16>, i32} %call, 1
2401 store i32 %cc, i32 *%ccptr
2406 define <4 x i32> @test_vfaefs(<4 x i32> %a, <4 x i32> %b, i32 *%ccptr) {
2407 ; CHECK-LABEL: test_vfaefs:
2408 ; CHECK: vfaefs %v24, %v24, %v26, 8
2409 ; CHECK: ipm [[REG:%r[0-5]]]
2410 ; CHECK: srl [[REG]], 28
2411 ; CHECK: st [[REG]], 0(%r2)
2413 %call = call {<4 x i32>, i32} @llvm.s390.vfaefs(<4 x i32> %a, <4 x i32> %b,
2415 %res = extractvalue {<4 x i32>, i32} %call, 0
2416 %cc = extractvalue {<4 x i32>, i32} %call, 1
2417 store i32 %cc, i32 *%ccptr
2421 ; VFAEZB with !IN !RT.
2422 define <16 x i8> @test_vfaezb_0(<16 x i8> %a, <16 x i8> %b) {
2423 ; CHECK-LABEL: test_vfaezb_0:
2424 ; CHECK: vfaezb %v24, %v24, %v26, 0
2426 %res = call <16 x i8> @llvm.s390.vfaezb(<16 x i8> %a, <16 x i8> %b, i32 0)
2430 ; VFAEZB with !IN RT.
2431 define <16 x i8> @test_vfaezb_4(<16 x i8> %a, <16 x i8> %b) {
2432 ; CHECK-LABEL: test_vfaezb_4:
2433 ; CHECK: vfaezb %v24, %v24, %v26, 4
2435 %res = call <16 x i8> @llvm.s390.vfaezb(<16 x i8> %a, <16 x i8> %b, i32 4)
2439 ; VFAEZB with IN !RT.
2440 define <16 x i8> @test_vfaezb_8(<16 x i8> %a, <16 x i8> %b) {
2441 ; CHECK-LABEL: test_vfaezb_8:
2442 ; CHECK: vfaezb %v24, %v24, %v26, 8
2444 %res = call <16 x i8> @llvm.s390.vfaezb(<16 x i8> %a, <16 x i8> %b, i32 8)
2448 ; VFAEZB with IN RT.
2449 define <16 x i8> @test_vfaezb_12(<16 x i8> %a, <16 x i8> %b) {
2450 ; CHECK-LABEL: test_vfaezb_12:
2451 ; CHECK: vfaezb %v24, %v24, %v26, 12
2453 %res = call <16 x i8> @llvm.s390.vfaezb(<16 x i8> %a, <16 x i8> %b, i32 12)
2457 ; VFAEZB with CS -- should be ignored.
2458 define <16 x i8> @test_vfaezb_1(<16 x i8> %a, <16 x i8> %b) {
2459 ; CHECK-LABEL: test_vfaezb_1:
2460 ; CHECK: vfaezb %v24, %v24, %v26, 0
2462 %res = call <16 x i8> @llvm.s390.vfaezb(<16 x i8> %a, <16 x i8> %b, i32 1)
2467 define <8 x i16> @test_vfaezh(<8 x i16> %a, <8 x i16> %b) {
2468 ; CHECK-LABEL: test_vfaezh:
2469 ; CHECK: vfaezh %v24, %v24, %v26, 4
2471 %res = call <8 x i16> @llvm.s390.vfaezh(<8 x i16> %a, <8 x i16> %b, i32 4)
2476 define <4 x i32> @test_vfaezf(<4 x i32> %a, <4 x i32> %b) {
2477 ; CHECK-LABEL: test_vfaezf:
2478 ; CHECK: vfaezf %v24, %v24, %v26, 8
2480 %res = call <4 x i32> @llvm.s390.vfaezf(<4 x i32> %a, <4 x i32> %b, i32 8)
2485 define <16 x i8> @test_vfaezbs(<16 x i8> %a, <16 x i8> %b, i32 *%ccptr) {
2486 ; CHECK-LABEL: test_vfaezbs:
2487 ; CHECK: vfaezbs %v24, %v24, %v26, 0
2488 ; CHECK: ipm [[REG:%r[0-5]]]
2489 ; CHECK: srl [[REG]], 28
2490 ; CHECK: st [[REG]], 0(%r2)
2492 %call = call {<16 x i8>, i32} @llvm.s390.vfaezbs(<16 x i8> %a, <16 x i8> %b,
2494 %res = extractvalue {<16 x i8>, i32} %call, 0
2495 %cc = extractvalue {<16 x i8>, i32} %call, 1
2496 store i32 %cc, i32 *%ccptr
2501 define <8 x i16> @test_vfaezhs(<8 x i16> %a, <8 x i16> %b, i32 *%ccptr) {
2502 ; CHECK-LABEL: test_vfaezhs:
2503 ; CHECK: vfaezhs %v24, %v24, %v26, 4
2504 ; CHECK: ipm [[REG:%r[0-5]]]
2505 ; CHECK: srl [[REG]], 28
2506 ; CHECK: st [[REG]], 0(%r2)
2508 %call = call {<8 x i16>, i32} @llvm.s390.vfaezhs(<8 x i16> %a, <8 x i16> %b,
2510 %res = extractvalue {<8 x i16>, i32} %call, 0
2511 %cc = extractvalue {<8 x i16>, i32} %call, 1
2512 store i32 %cc, i32 *%ccptr
2517 define <4 x i32> @test_vfaezfs(<4 x i32> %a, <4 x i32> %b, i32 *%ccptr) {
2518 ; CHECK-LABEL: test_vfaezfs:
2519 ; CHECK: vfaezfs %v24, %v24, %v26, 8
2520 ; CHECK: ipm [[REG:%r[0-5]]]
2521 ; CHECK: srl [[REG]], 28
2522 ; CHECK: st [[REG]], 0(%r2)
2524 %call = call {<4 x i32>, i32} @llvm.s390.vfaezfs(<4 x i32> %a, <4 x i32> %b,
2526 %res = extractvalue {<4 x i32>, i32} %call, 0
2527 %cc = extractvalue {<4 x i32>, i32} %call, 1
2528 store i32 %cc, i32 *%ccptr
2533 define <16 x i8> @test_vfeeb_0(<16 x i8> %a, <16 x i8> %b) {
2534 ; CHECK-LABEL: test_vfeeb_0:
2535 ; CHECK: vfeeb %v24, %v24, %v26
2537 %res = call <16 x i8> @llvm.s390.vfeeb(<16 x i8> %a, <16 x i8> %b)
2542 define <8 x i16> @test_vfeeh(<8 x i16> %a, <8 x i16> %b) {
2543 ; CHECK-LABEL: test_vfeeh:
2544 ; CHECK: vfeeh %v24, %v24, %v26
2546 %res = call <8 x i16> @llvm.s390.vfeeh(<8 x i16> %a, <8 x i16> %b)
2551 define <4 x i32> @test_vfeef(<4 x i32> %a, <4 x i32> %b) {
2552 ; CHECK-LABEL: test_vfeef:
2553 ; CHECK: vfeef %v24, %v24, %v26
2555 %res = call <4 x i32> @llvm.s390.vfeef(<4 x i32> %a, <4 x i32> %b)
2560 define <16 x i8> @test_vfeebs(<16 x i8> %a, <16 x i8> %b, i32 *%ccptr) {
2561 ; CHECK-LABEL: test_vfeebs:
2562 ; CHECK: vfeebs %v24, %v24, %v26
2563 ; CHECK: ipm [[REG:%r[0-5]]]
2564 ; CHECK: srl [[REG]], 28
2565 ; CHECK: st [[REG]], 0(%r2)
2567 %call = call {<16 x i8>, i32} @llvm.s390.vfeebs(<16 x i8> %a, <16 x i8> %b)
2568 %res = extractvalue {<16 x i8>, i32} %call, 0
2569 %cc = extractvalue {<16 x i8>, i32} %call, 1
2570 store i32 %cc, i32 *%ccptr
2575 define <8 x i16> @test_vfeehs(<8 x i16> %a, <8 x i16> %b, i32 *%ccptr) {
2576 ; CHECK-LABEL: test_vfeehs:
2577 ; CHECK: vfeehs %v24, %v24, %v26
2578 ; CHECK: ipm [[REG:%r[0-5]]]
2579 ; CHECK: srl [[REG]], 28
2580 ; CHECK: st [[REG]], 0(%r2)
2582 %call = call {<8 x i16>, i32} @llvm.s390.vfeehs(<8 x i16> %a, <8 x i16> %b)
2583 %res = extractvalue {<8 x i16>, i32} %call, 0
2584 %cc = extractvalue {<8 x i16>, i32} %call, 1
2585 store i32 %cc, i32 *%ccptr
2590 define <4 x i32> @test_vfeefs(<4 x i32> %a, <4 x i32> %b, i32 *%ccptr) {
2591 ; CHECK-LABEL: test_vfeefs:
2592 ; CHECK: vfeefs %v24, %v24, %v26
2593 ; CHECK: ipm [[REG:%r[0-5]]]
2594 ; CHECK: srl [[REG]], 28
2595 ; CHECK: st [[REG]], 0(%r2)
2597 %call = call {<4 x i32>, i32} @llvm.s390.vfeefs(<4 x i32> %a, <4 x i32> %b)
2598 %res = extractvalue {<4 x i32>, i32} %call, 0
2599 %cc = extractvalue {<4 x i32>, i32} %call, 1
2600 store i32 %cc, i32 *%ccptr
2605 define <16 x i8> @test_vfeezb(<16 x i8> %a, <16 x i8> %b) {
2606 ; CHECK-LABEL: test_vfeezb:
2607 ; CHECK: vfeezb %v24, %v24, %v26
2609 %res = call <16 x i8> @llvm.s390.vfeezb(<16 x i8> %a, <16 x i8> %b)
2614 define <8 x i16> @test_vfeezh(<8 x i16> %a, <8 x i16> %b) {
2615 ; CHECK-LABEL: test_vfeezh:
2616 ; CHECK: vfeezh %v24, %v24, %v26
2618 %res = call <8 x i16> @llvm.s390.vfeezh(<8 x i16> %a, <8 x i16> %b)
2623 define <4 x i32> @test_vfeezf(<4 x i32> %a, <4 x i32> %b) {
2624 ; CHECK-LABEL: test_vfeezf:
2625 ; CHECK: vfeezf %v24, %v24, %v26
2627 %res = call <4 x i32> @llvm.s390.vfeezf(<4 x i32> %a, <4 x i32> %b)
2632 define <16 x i8> @test_vfeezbs(<16 x i8> %a, <16 x i8> %b, i32 *%ccptr) {
2633 ; CHECK-LABEL: test_vfeezbs:
2634 ; CHECK: vfeezbs %v24, %v24, %v26
2635 ; CHECK: ipm [[REG:%r[0-5]]]
2636 ; CHECK: srl [[REG]], 28
2637 ; CHECK: st [[REG]], 0(%r2)
2639 %call = call {<16 x i8>, i32} @llvm.s390.vfeezbs(<16 x i8> %a, <16 x i8> %b)
2640 %res = extractvalue {<16 x i8>, i32} %call, 0
2641 %cc = extractvalue {<16 x i8>, i32} %call, 1
2642 store i32 %cc, i32 *%ccptr
2647 define <8 x i16> @test_vfeezhs(<8 x i16> %a, <8 x i16> %b, i32 *%ccptr) {
2648 ; CHECK-LABEL: test_vfeezhs:
2649 ; CHECK: vfeezhs %v24, %v24, %v26
2650 ; CHECK: ipm [[REG:%r[0-5]]]
2651 ; CHECK: srl [[REG]], 28
2652 ; CHECK: st [[REG]], 0(%r2)
2654 %call = call {<8 x i16>, i32} @llvm.s390.vfeezhs(<8 x i16> %a, <8 x i16> %b)
2655 %res = extractvalue {<8 x i16>, i32} %call, 0
2656 %cc = extractvalue {<8 x i16>, i32} %call, 1
2657 store i32 %cc, i32 *%ccptr
2662 define <4 x i32> @test_vfeezfs(<4 x i32> %a, <4 x i32> %b, i32 *%ccptr) {
2663 ; CHECK-LABEL: test_vfeezfs:
2664 ; CHECK: vfeezfs %v24, %v24, %v26
2665 ; CHECK: ipm [[REG:%r[0-5]]]
2666 ; CHECK: srl [[REG]], 28
2667 ; CHECK: st [[REG]], 0(%r2)
2669 %call = call {<4 x i32>, i32} @llvm.s390.vfeezfs(<4 x i32> %a, <4 x i32> %b)
2670 %res = extractvalue {<4 x i32>, i32} %call, 0
2671 %cc = extractvalue {<4 x i32>, i32} %call, 1
2672 store i32 %cc, i32 *%ccptr
2677 define <16 x i8> @test_vfeneb_0(<16 x i8> %a, <16 x i8> %b) {
2678 ; CHECK-LABEL: test_vfeneb_0:
2679 ; CHECK: vfeneb %v24, %v24, %v26
2681 %res = call <16 x i8> @llvm.s390.vfeneb(<16 x i8> %a, <16 x i8> %b)
2686 define <8 x i16> @test_vfeneh(<8 x i16> %a, <8 x i16> %b) {
2687 ; CHECK-LABEL: test_vfeneh:
2688 ; CHECK: vfeneh %v24, %v24, %v26
2690 %res = call <8 x i16> @llvm.s390.vfeneh(<8 x i16> %a, <8 x i16> %b)
2695 define <4 x i32> @test_vfenef(<4 x i32> %a, <4 x i32> %b) {
2696 ; CHECK-LABEL: test_vfenef:
2697 ; CHECK: vfenef %v24, %v24, %v26
2699 %res = call <4 x i32> @llvm.s390.vfenef(<4 x i32> %a, <4 x i32> %b)
2704 define <16 x i8> @test_vfenebs(<16 x i8> %a, <16 x i8> %b, i32 *%ccptr) {
2705 ; CHECK-LABEL: test_vfenebs:
2706 ; CHECK: vfenebs %v24, %v24, %v26
2707 ; CHECK: ipm [[REG:%r[0-5]]]
2708 ; CHECK: srl [[REG]], 28
2709 ; CHECK: st [[REG]], 0(%r2)
2711 %call = call {<16 x i8>, i32} @llvm.s390.vfenebs(<16 x i8> %a, <16 x i8> %b)
2712 %res = extractvalue {<16 x i8>, i32} %call, 0
2713 %cc = extractvalue {<16 x i8>, i32} %call, 1
2714 store i32 %cc, i32 *%ccptr
2719 define <8 x i16> @test_vfenehs(<8 x i16> %a, <8 x i16> %b, i32 *%ccptr) {
2720 ; CHECK-LABEL: test_vfenehs:
2721 ; CHECK: vfenehs %v24, %v24, %v26
2722 ; CHECK: ipm [[REG:%r[0-5]]]
2723 ; CHECK: srl [[REG]], 28
2724 ; CHECK: st [[REG]], 0(%r2)
2726 %call = call {<8 x i16>, i32} @llvm.s390.vfenehs(<8 x i16> %a, <8 x i16> %b)
2727 %res = extractvalue {<8 x i16>, i32} %call, 0
2728 %cc = extractvalue {<8 x i16>, i32} %call, 1
2729 store i32 %cc, i32 *%ccptr
2734 define <4 x i32> @test_vfenefs(<4 x i32> %a, <4 x i32> %b, i32 *%ccptr) {
2735 ; CHECK-LABEL: test_vfenefs:
2736 ; CHECK: vfenefs %v24, %v24, %v26
2737 ; CHECK: ipm [[REG:%r[0-5]]]
2738 ; CHECK: srl [[REG]], 28
2739 ; CHECK: st [[REG]], 0(%r2)
2741 %call = call {<4 x i32>, i32} @llvm.s390.vfenefs(<4 x i32> %a, <4 x i32> %b)
2742 %res = extractvalue {<4 x i32>, i32} %call, 0
2743 %cc = extractvalue {<4 x i32>, i32} %call, 1
2744 store i32 %cc, i32 *%ccptr
2749 define <16 x i8> @test_vfenezb(<16 x i8> %a, <16 x i8> %b) {
2750 ; CHECK-LABEL: test_vfenezb:
2751 ; CHECK: vfenezb %v24, %v24, %v26
2753 %res = call <16 x i8> @llvm.s390.vfenezb(<16 x i8> %a, <16 x i8> %b)
2758 define <8 x i16> @test_vfenezh(<8 x i16> %a, <8 x i16> %b) {
2759 ; CHECK-LABEL: test_vfenezh:
2760 ; CHECK: vfenezh %v24, %v24, %v26
2762 %res = call <8 x i16> @llvm.s390.vfenezh(<8 x i16> %a, <8 x i16> %b)
2767 define <4 x i32> @test_vfenezf(<4 x i32> %a, <4 x i32> %b) {
2768 ; CHECK-LABEL: test_vfenezf:
2769 ; CHECK: vfenezf %v24, %v24, %v26
2771 %res = call <4 x i32> @llvm.s390.vfenezf(<4 x i32> %a, <4 x i32> %b)
2776 define <16 x i8> @test_vfenezbs(<16 x i8> %a, <16 x i8> %b, i32 *%ccptr) {
2777 ; CHECK-LABEL: test_vfenezbs:
2778 ; CHECK: vfenezbs %v24, %v24, %v26
2779 ; CHECK: ipm [[REG:%r[0-5]]]
2780 ; CHECK: srl [[REG]], 28
2781 ; CHECK: st [[REG]], 0(%r2)
2783 %call = call {<16 x i8>, i32} @llvm.s390.vfenezbs(<16 x i8> %a, <16 x i8> %b)
2784 %res = extractvalue {<16 x i8>, i32} %call, 0
2785 %cc = extractvalue {<16 x i8>, i32} %call, 1
2786 store i32 %cc, i32 *%ccptr
2791 define <8 x i16> @test_vfenezhs(<8 x i16> %a, <8 x i16> %b, i32 *%ccptr) {
2792 ; CHECK-LABEL: test_vfenezhs:
2793 ; CHECK: vfenezhs %v24, %v24, %v26
2794 ; CHECK: ipm [[REG:%r[0-5]]]
2795 ; CHECK: srl [[REG]], 28
2796 ; CHECK: st [[REG]], 0(%r2)
2798 %call = call {<8 x i16>, i32} @llvm.s390.vfenezhs(<8 x i16> %a, <8 x i16> %b)
2799 %res = extractvalue {<8 x i16>, i32} %call, 0
2800 %cc = extractvalue {<8 x i16>, i32} %call, 1
2801 store i32 %cc, i32 *%ccptr
2806 define <4 x i32> @test_vfenezfs(<4 x i32> %a, <4 x i32> %b, i32 *%ccptr) {
2807 ; CHECK-LABEL: test_vfenezfs:
2808 ; CHECK: vfenezfs %v24, %v24, %v26
2809 ; CHECK: ipm [[REG:%r[0-5]]]
2810 ; CHECK: srl [[REG]], 28
2811 ; CHECK: st [[REG]], 0(%r2)
2813 %call = call {<4 x i32>, i32} @llvm.s390.vfenezfs(<4 x i32> %a, <4 x i32> %b)
2814 %res = extractvalue {<4 x i32>, i32} %call, 0
2815 %cc = extractvalue {<4 x i32>, i32} %call, 1
2816 store i32 %cc, i32 *%ccptr
2821 define <16 x i8> @test_vistrb(<16 x i8> %a) {
2822 ; CHECK-LABEL: test_vistrb:
2823 ; CHECK: vistrb %v24, %v24
2825 %res = call <16 x i8> @llvm.s390.vistrb(<16 x i8> %a)
2830 define <8 x i16> @test_vistrh(<8 x i16> %a) {
2831 ; CHECK-LABEL: test_vistrh:
2832 ; CHECK: vistrh %v24, %v24
2834 %res = call <8 x i16> @llvm.s390.vistrh(<8 x i16> %a)
2839 define <4 x i32> @test_vistrf(<4 x i32> %a) {
2840 ; CHECK-LABEL: test_vistrf:
2841 ; CHECK: vistrf %v24, %v24
2843 %res = call <4 x i32> @llvm.s390.vistrf(<4 x i32> %a)
2848 define <16 x i8> @test_vistrbs(<16 x i8> %a, i32 *%ccptr) {
2849 ; CHECK-LABEL: test_vistrbs:
2850 ; CHECK: vistrbs %v24, %v24
2851 ; CHECK: ipm [[REG:%r[0-5]]]
2852 ; CHECK: srl [[REG]], 28
2853 ; CHECK: st [[REG]], 0(%r2)
2855 %call = call {<16 x i8>, i32} @llvm.s390.vistrbs(<16 x i8> %a)
2856 %res = extractvalue {<16 x i8>, i32} %call, 0
2857 %cc = extractvalue {<16 x i8>, i32} %call, 1
2858 store i32 %cc, i32 *%ccptr
2863 define <8 x i16> @test_vistrhs(<8 x i16> %a, i32 *%ccptr) {
2864 ; CHECK-LABEL: test_vistrhs:
2865 ; CHECK: vistrhs %v24, %v24
2866 ; CHECK: ipm [[REG:%r[0-5]]]
2867 ; CHECK: srl [[REG]], 28
2868 ; CHECK: st [[REG]], 0(%r2)
2870 %call = call {<8 x i16>, i32} @llvm.s390.vistrhs(<8 x i16> %a)
2871 %res = extractvalue {<8 x i16>, i32} %call, 0
2872 %cc = extractvalue {<8 x i16>, i32} %call, 1
2873 store i32 %cc, i32 *%ccptr
2878 define <4 x i32> @test_vistrfs(<4 x i32> %a, i32 *%ccptr) {
2879 ; CHECK-LABEL: test_vistrfs:
2880 ; CHECK: vistrfs %v24, %v24
2881 ; CHECK: ipm [[REG:%r[0-5]]]
2882 ; CHECK: srl [[REG]], 28
2883 ; CHECK: st [[REG]], 0(%r2)
2885 %call = call {<4 x i32>, i32} @llvm.s390.vistrfs(<4 x i32> %a)
2886 %res = extractvalue {<4 x i32>, i32} %call, 0
2887 %cc = extractvalue {<4 x i32>, i32} %call, 1
2888 store i32 %cc, i32 *%ccptr
2892 ; VSTRCB with !IN !RT.
2893 define <16 x i8> @test_vstrcb_0(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
2894 ; CHECK-LABEL: test_vstrcb_0:
2895 ; CHECK: vstrcb %v24, %v24, %v26, %v28, 0
2897 %res = call <16 x i8> @llvm.s390.vstrcb(<16 x i8> %a, <16 x i8> %b,
2898 <16 x i8> %c, i32 0)
2902 ; VSTRCB with !IN RT.
2903 define <16 x i8> @test_vstrcb_4(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
2904 ; CHECK-LABEL: test_vstrcb_4:
2905 ; CHECK: vstrcb %v24, %v24, %v26, %v28, 4
2907 %res = call <16 x i8> @llvm.s390.vstrcb(<16 x i8> %a, <16 x i8> %b,
2908 <16 x i8> %c, i32 4)
2912 ; VSTRCB with IN !RT.
2913 define <16 x i8> @test_vstrcb_8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
2914 ; CHECK-LABEL: test_vstrcb_8:
2915 ; CHECK: vstrcb %v24, %v24, %v26, %v28, 8
2917 %res = call <16 x i8> @llvm.s390.vstrcb(<16 x i8> %a, <16 x i8> %b,
2918 <16 x i8> %c, i32 8)
2922 ; VSTRCB with IN RT.
2923 define <16 x i8> @test_vstrcb_12(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
2924 ; CHECK-LABEL: test_vstrcb_12:
2925 ; CHECK: vstrcb %v24, %v24, %v26, %v28, 12
2927 %res = call <16 x i8> @llvm.s390.vstrcb(<16 x i8> %a, <16 x i8> %b,
2928 <16 x i8> %c, i32 12)
2932 ; VSTRCB with CS -- should be ignored.
2933 define <16 x i8> @test_vstrcb_1(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
2934 ; CHECK-LABEL: test_vstrcb_1:
2935 ; CHECK: vstrcb %v24, %v24, %v26, %v28, 0
2937 %res = call <16 x i8> @llvm.s390.vstrcb(<16 x i8> %a, <16 x i8> %b,
2938 <16 x i8> %c, i32 1)
2943 define <8 x i16> @test_vstrch(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c) {
2944 ; CHECK-LABEL: test_vstrch:
2945 ; CHECK: vstrch %v24, %v24, %v26, %v28, 4
2947 %res = call <8 x i16> @llvm.s390.vstrch(<8 x i16> %a, <8 x i16> %b,
2948 <8 x i16> %c, i32 4)
2953 define <4 x i32> @test_vstrcf(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
2954 ; CHECK-LABEL: test_vstrcf:
2955 ; CHECK: vstrcf %v24, %v24, %v26, %v28, 8
2957 %res = call <4 x i32> @llvm.s390.vstrcf(<4 x i32> %a, <4 x i32> %b,
2958 <4 x i32> %c, i32 8)
2963 define <16 x i8> @test_vstrcbs(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c,
2965 ; CHECK-LABEL: test_vstrcbs:
2966 ; CHECK: vstrcbs %v24, %v24, %v26, %v28, 0
2967 ; CHECK: ipm [[REG:%r[0-5]]]
2968 ; CHECK: srl [[REG]], 28
2969 ; CHECK: st [[REG]], 0(%r2)
2971 %call = call {<16 x i8>, i32} @llvm.s390.vstrcbs(<16 x i8> %a, <16 x i8> %b,
2972 <16 x i8> %c, i32 0)
2973 %res = extractvalue {<16 x i8>, i32} %call, 0
2974 %cc = extractvalue {<16 x i8>, i32} %call, 1
2975 store i32 %cc, i32 *%ccptr
2980 define <8 x i16> @test_vstrchs(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c,
2982 ; CHECK-LABEL: test_vstrchs:
2983 ; CHECK: vstrchs %v24, %v24, %v26, %v28, 4
2984 ; CHECK: ipm [[REG:%r[0-5]]]
2985 ; CHECK: srl [[REG]], 28
2986 ; CHECK: st [[REG]], 0(%r2)
2988 %call = call {<8 x i16>, i32} @llvm.s390.vstrchs(<8 x i16> %a, <8 x i16> %b,
2989 <8 x i16> %c, i32 4)
2990 %res = extractvalue {<8 x i16>, i32} %call, 0
2991 %cc = extractvalue {<8 x i16>, i32} %call, 1
2992 store i32 %cc, i32 *%ccptr
2997 define <4 x i32> @test_vstrcfs(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c,
2999 ; CHECK-LABEL: test_vstrcfs:
3000 ; CHECK: vstrcfs %v24, %v24, %v26, %v28, 8
3001 ; CHECK: ipm [[REG:%r[0-5]]]
3002 ; CHECK: srl [[REG]], 28
3003 ; CHECK: st [[REG]], 0(%r2)
3005 %call = call {<4 x i32>, i32} @llvm.s390.vstrcfs(<4 x i32> %a, <4 x i32> %b,
3006 <4 x i32> %c, i32 8)
3007 %res = extractvalue {<4 x i32>, i32} %call, 0
3008 %cc = extractvalue {<4 x i32>, i32} %call, 1
3009 store i32 %cc, i32 *%ccptr
3013 ; VSTRCZB with !IN !RT.
3014 define <16 x i8> @test_vstrczb_0(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
3015 ; CHECK-LABEL: test_vstrczb_0:
3016 ; CHECK: vstrczb %v24, %v24, %v26, %v28, 0
3018 %res = call <16 x i8> @llvm.s390.vstrczb(<16 x i8> %a, <16 x i8> %b,
3019 <16 x i8> %c, i32 0)
3023 ; VSTRCZB with !IN RT.
3024 define <16 x i8> @test_vstrczb_4(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
3025 ; CHECK-LABEL: test_vstrczb_4:
3026 ; CHECK: vstrczb %v24, %v24, %v26, %v28, 4
3028 %res = call <16 x i8> @llvm.s390.vstrczb(<16 x i8> %a, <16 x i8> %b,
3029 <16 x i8> %c, i32 4)
3033 ; VSTRCZB with IN !RT.
3034 define <16 x i8> @test_vstrczb_8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
3035 ; CHECK-LABEL: test_vstrczb_8:
3036 ; CHECK: vstrczb %v24, %v24, %v26, %v28, 8
3038 %res = call <16 x i8> @llvm.s390.vstrczb(<16 x i8> %a, <16 x i8> %b,
3039 <16 x i8> %c, i32 8)
3043 ; VSTRCZB with IN RT.
3044 define <16 x i8> @test_vstrczb_12(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
3045 ; CHECK-LABEL: test_vstrczb_12:
3046 ; CHECK: vstrczb %v24, %v24, %v26, %v28, 12
3048 %res = call <16 x i8> @llvm.s390.vstrczb(<16 x i8> %a, <16 x i8> %b,
3049 <16 x i8> %c, i32 12)
3053 ; VSTRCZB with CS -- should be ignored.
3054 define <16 x i8> @test_vstrczb_1(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
3055 ; CHECK-LABEL: test_vstrczb_1:
3056 ; CHECK: vstrczb %v24, %v24, %v26, %v28, 0
3058 %res = call <16 x i8> @llvm.s390.vstrczb(<16 x i8> %a, <16 x i8> %b,
3059 <16 x i8> %c, i32 1)
3064 define <8 x i16> @test_vstrczh(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c) {
3065 ; CHECK-LABEL: test_vstrczh:
3066 ; CHECK: vstrczh %v24, %v24, %v26, %v28, 4
3068 %res = call <8 x i16> @llvm.s390.vstrczh(<8 x i16> %a, <8 x i16> %b,
3069 <8 x i16> %c, i32 4)
3074 define <4 x i32> @test_vstrczf(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
3075 ; CHECK-LABEL: test_vstrczf:
3076 ; CHECK: vstrczf %v24, %v24, %v26, %v28, 8
3078 %res = call <4 x i32> @llvm.s390.vstrczf(<4 x i32> %a, <4 x i32> %b,
3079 <4 x i32> %c, i32 8)
3084 define <16 x i8> @test_vstrczbs(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c,
3086 ; CHECK-LABEL: test_vstrczbs:
3087 ; CHECK: vstrczbs %v24, %v24, %v26, %v28, 0
3088 ; CHECK: ipm [[REG:%r[0-5]]]
3089 ; CHECK: srl [[REG]], 28
3090 ; CHECK: st [[REG]], 0(%r2)
3092 %call = call {<16 x i8>, i32} @llvm.s390.vstrczbs(<16 x i8> %a, <16 x i8> %b,
3093 <16 x i8> %c, i32 0)
3094 %res = extractvalue {<16 x i8>, i32} %call, 0
3095 %cc = extractvalue {<16 x i8>, i32} %call, 1
3096 store i32 %cc, i32 *%ccptr
3101 define <8 x i16> @test_vstrczhs(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c,
3103 ; CHECK-LABEL: test_vstrczhs:
3104 ; CHECK: vstrczhs %v24, %v24, %v26, %v28, 4
3105 ; CHECK: ipm [[REG:%r[0-5]]]
3106 ; CHECK: srl [[REG]], 28
3107 ; CHECK: st [[REG]], 0(%r2)
3109 %call = call {<8 x i16>, i32} @llvm.s390.vstrczhs(<8 x i16> %a, <8 x i16> %b,
3110 <8 x i16> %c, i32 4)
3111 %res = extractvalue {<8 x i16>, i32} %call, 0
3112 %cc = extractvalue {<8 x i16>, i32} %call, 1
3113 store i32 %cc, i32 *%ccptr
3118 define <4 x i32> @test_vstrczfs(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c,
3120 ; CHECK-LABEL: test_vstrczfs:
3121 ; CHECK: vstrczfs %v24, %v24, %v26, %v28, 8
3122 ; CHECK: ipm [[REG:%r[0-5]]]
3123 ; CHECK: srl [[REG]], 28
3124 ; CHECK: st [[REG]], 0(%r2)
3126 %call = call {<4 x i32>, i32} @llvm.s390.vstrczfs(<4 x i32> %a, <4 x i32> %b,
3127 <4 x i32> %c, i32 8)
3128 %res = extractvalue {<4 x i32>, i32} %call, 0
3129 %cc = extractvalue {<4 x i32>, i32} %call, 1
3130 store i32 %cc, i32 *%ccptr
3134 ; VFCEDBS with no processing of the result.
3135 define i32 @test_vfcedbs(<2 x double> %a, <2 x double> %b) {
3136 ; CHECK-LABEL: test_vfcedbs:
3137 ; CHECK: vfcedbs {{%v[0-9]+}}, %v24, %v26
3139 ; CHECK: srl %r2, 28
3141 %call = call {<2 x i64>, i32} @llvm.s390.vfcedbs(<2 x double> %a,
3143 %res = extractvalue {<2 x i64>, i32} %call, 1
3147 ; VFCEDBS, returning 1 if any elements are equal (CC != 3).
3148 define i32 @test_vfcedbs_any_bool(<2 x double> %a, <2 x double> %b) {
3149 ; CHECK-LABEL: test_vfcedbs_any_bool:
3150 ; CHECK: vfcedbs {{%v[0-9]+}}, %v24, %v26
3152 ; CHECK: afi %r2, -536870912
3153 ; CHECK: srl %r2, 31
3155 %call = call {<2 x i64>, i32} @llvm.s390.vfcedbs(<2 x double> %a,
3157 %res = extractvalue {<2 x i64>, i32} %call, 1
3158 %cmp = icmp ne i32 %res, 3
3159 %ext = zext i1 %cmp to i32
3163 ; VFCEDBS, storing to %ptr if any elements are equal.
3164 define <2 x i64> @test_vfcedbs_any_store(<2 x double> %a, <2 x double> %b,
3166 ; CHECK-LABEL: test_vfcedbs_any_store:
3168 ; CHECK: vfcedbs %v24, %v24, %v26
3169 ; CHECK-NEXT: {{jo|jnle}} {{\.L*}}
3170 ; CHECK: mvhi 0(%r2), 0
3172 %call = call {<2 x i64>, i32} @llvm.s390.vfcedbs(<2 x double> %a,
3174 %res = extractvalue {<2 x i64>, i32} %call, 0
3175 %cc = extractvalue {<2 x i64>, i32} %call, 1
3176 %cmp = icmp ule i32 %cc, 2
3177 br i1 %cmp, label %store, label %exit
3180 store i32 0, i32 *%ptr
3187 ; VFCHDBS with no processing of the result.
3188 define i32 @test_vfchdbs(<2 x double> %a, <2 x double> %b) {
3189 ; CHECK-LABEL: test_vfchdbs:
3190 ; CHECK: vfchdbs {{%v[0-9]+}}, %v24, %v26
3192 ; CHECK: srl %r2, 28
3194 %call = call {<2 x i64>, i32} @llvm.s390.vfchdbs(<2 x double> %a,
3196 %res = extractvalue {<2 x i64>, i32} %call, 1
3200 ; VFCHDBS, returning 1 if not all elements are higher.
3201 define i32 @test_vfchdbs_notall_bool(<2 x double> %a, <2 x double> %b) {
3202 ; CHECK-LABEL: test_vfchdbs_notall_bool:
3203 ; CHECK: vfchdbs {{%v[0-9]+}}, %v24, %v26
3204 ; CHECK: ipm [[REG:%r[0-5]]]
3205 ; CHECK: risblg %r2, [[REG]], 31, 159, 36
3207 %call = call {<2 x i64>, i32} @llvm.s390.vfchdbs(<2 x double> %a,
3209 %res = extractvalue {<2 x i64>, i32} %call, 1
3210 %cmp = icmp sge i32 %res, 1
3211 %ext = zext i1 %cmp to i32
3215 ; VFCHDBS, storing to %ptr if not all elements are higher.
3216 define <2 x i64> @test_vfchdbs_notall_store(<2 x double> %a, <2 x double> %b,
3218 ; CHECK-LABEL: test_vfchdbs_notall_store:
3220 ; CHECK: vfchdbs %v24, %v24, %v26
3221 ; CHECK-NEXT: {{jhe|je}} {{\.L*}}
3222 ; CHECK: mvhi 0(%r2), 0
3224 %call = call {<2 x i64>, i32} @llvm.s390.vfchdbs(<2 x double> %a,
3226 %res = extractvalue {<2 x i64>, i32} %call, 0
3227 %cc = extractvalue {<2 x i64>, i32} %call, 1
3228 %cmp = icmp ugt i32 %cc, 0
3229 br i1 %cmp, label %store, label %exit
3232 store i32 0, i32 *%ptr
3239 ; VFCHEDBS with no processing of the result.
3240 define i32 @test_vfchedbs(<2 x double> %a, <2 x double> %b) {
3241 ; CHECK-LABEL: test_vfchedbs:
3242 ; CHECK: vfchedbs {{%v[0-9]+}}, %v24, %v26
3244 ; CHECK: srl %r2, 28
3246 %call = call {<2 x i64>, i32} @llvm.s390.vfchedbs(<2 x double> %a,
3248 %res = extractvalue {<2 x i64>, i32} %call, 1
3252 ; VFCHEDBS, returning 1 if neither element is higher or equal.
3253 define i32 @test_vfchedbs_none_bool(<2 x double> %a, <2 x double> %b) {
3254 ; CHECK-LABEL: test_vfchedbs_none_bool:
3255 ; CHECK: vfchedbs {{%v[0-9]+}}, %v24, %v26
3256 ; CHECK: ipm [[REG:%r[0-5]]]
3257 ; CHECK: risblg %r2, [[REG]], 31, 159, 35
3259 %call = call {<2 x i64>, i32} @llvm.s390.vfchedbs(<2 x double> %a,
3261 %res = extractvalue {<2 x i64>, i32} %call, 1
3262 %cmp = icmp eq i32 %res, 3
3263 %ext = zext i1 %cmp to i32
3267 ; VFCHEDBS, storing to %ptr if neither element is higher or equal.
3268 define <2 x i64> @test_vfchedbs_none_store(<2 x double> %a, <2 x double> %b,
3270 ; CHECK-LABEL: test_vfchedbs_none_store:
3272 ; CHECK: vfchedbs %v24, %v24, %v26
3273 ; CHECK-NEXT: {{jno|jle}} {{\.L*}}
3274 ; CHECK: mvhi 0(%r2), 0
3276 %call = call {<2 x i64>, i32} @llvm.s390.vfchedbs(<2 x double> %a,
3278 %res = extractvalue {<2 x i64>, i32} %call, 0
3279 %cc = extractvalue {<2 x i64>, i32} %call, 1
3280 %cmp = icmp uge i32 %cc, 3
3281 br i1 %cmp, label %store, label %exit
3284 store i32 0, i32 *%ptr
3291 ; VFTCIDB with the lowest useful class selector and no processing of the result.
3292 define i32 @test_vftcidb(<2 x double> %a) {
3293 ; CHECK-LABEL: test_vftcidb:
3294 ; CHECK: vftcidb {{%v[0-9]+}}, %v24, 1
3296 ; CHECK: srl %r2, 28
3298 %call = call {<2 x i64>, i32} @llvm.s390.vftcidb(<2 x double> %a, i32 1)
3299 %res = extractvalue {<2 x i64>, i32} %call, 1
3303 ; VFTCIDB with the highest useful class selector, returning 1 if all elements
3304 ; have the right class (CC == 0).
3305 define i32 @test_vftcidb_all_bool(<2 x double> %a) {
3306 ; CHECK-LABEL: test_vftcidb_all_bool:
3307 ; CHECK: vftcidb {{%v[0-9]+}}, %v24, 4094
3308 ; CHECK: afi %r2, -268435456
3309 ; CHECK: srl %r2, 31
3311 %call = call {<2 x i64>, i32} @llvm.s390.vftcidb(<2 x double> %a, i32 4094)
3312 %res = extractvalue {<2 x i64>, i32} %call, 1
3313 %cmp = icmp eq i32 %res, 0
3314 %ext = zext i1 %cmp to i32
3318 ; VFIDB with a rounding mode not usable via standard intrinsics.
3319 define <2 x double> @test_vfidb_0_4(<2 x double> %a) {
3320 ; CHECK-LABEL: test_vfidb_0_4:
3321 ; CHECK: vfidb %v24, %v24, 0, 4
3323 %res = call <2 x double> @llvm.s390.vfidb(<2 x double> %a, i32 0, i32 4)
3324 ret <2 x double> %res
3327 ; VFIDB with IEEE-inexact exception suppressed.
3328 define <2 x double> @test_vfidb_4_0(<2 x double> %a) {
3329 ; CHECK-LABEL: test_vfidb_4_0:
3330 ; CHECK: vfidb %v24, %v24, 4, 0
3332 %res = call <2 x double> @llvm.s390.vfidb(<2 x double> %a, i32 4, i32 0)
3333 ret <2 x double> %res