1 ; RUN: llc < %s -mtriple=thumbv7-none-eabi -mcpu=cortex-m3 | FileCheck %s -check-prefix=CHECK -check-prefix=SOFT -check-prefix=NONE
2 ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m4 | FileCheck %s -check-prefix=CHECK -check-prefix=SOFT -check-prefix=SP
3 ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m7 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=DP -check-prefix=VFP -check-prefix=FP-ARMv8
4 ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m7 -mattr=+fp-only-sp | FileCheck %s -check-prefix=CHECK -check-prefix=SOFT -check-prefix=SP
5 ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-a7 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=DP -check-prefix=NEON -check-prefix=VFP4
6 ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-a57 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=DP -check-prefix=NEON -check-prefix=FP-ARMv8
8 declare double @llvm.sqrt.f64(double %Val)
9 define double @sqrt_d(double %a) {
10 ; CHECK-LABEL: sqrt_d:
11 ; SOFT: {{(bl|b)}} sqrt
12 ; HARD: vsqrt.f64 d0, d0
13 %1 = call double @llvm.sqrt.f64(double %a)
17 declare double @llvm.powi.f64(double %Val, i32 %power)
18 define double @powi_d(double %a, i32 %b) {
19 ; CHECK-LABEL: powi_d:
20 ; SOFT: {{(bl|b)}} __powidf2
22 %1 = call double @llvm.powi.f64(double %a, i32 %b)
26 declare double @llvm.sin.f64(double %Val)
27 define double @sin_d(double %a) {
29 ; SOFT: {{(bl|b)}} sin
31 %1 = call double @llvm.sin.f64(double %a)
35 declare double @llvm.cos.f64(double %Val)
36 define double @cos_d(double %a) {
38 ; SOFT: {{(bl|b)}} cos
40 %1 = call double @llvm.cos.f64(double %a)
44 declare double @llvm.pow.f64(double %Val, double %power)
45 define double @pow_d(double %a, double %b) {
47 ; SOFT: {{(bl|b)}} pow
49 %1 = call double @llvm.pow.f64(double %a, double %b)
53 declare double @llvm.exp.f64(double %Val)
54 define double @exp_d(double %a) {
56 ; SOFT: {{(bl|b)}} exp
58 %1 = call double @llvm.exp.f64(double %a)
62 declare double @llvm.exp2.f64(double %Val)
63 define double @exp2_d(double %a) {
64 ; CHECK-LABEL: exp2_d:
65 ; SOFT: {{(bl|b)}} exp2
67 %1 = call double @llvm.exp2.f64(double %a)
71 declare double @llvm.log.f64(double %Val)
72 define double @log_d(double %a) {
74 ; SOFT: {{(bl|b)}} log
76 %1 = call double @llvm.log.f64(double %a)
80 declare double @llvm.log10.f64(double %Val)
81 define double @log10_d(double %a) {
82 ; CHECK-LABEL: log10_d:
83 ; SOFT: {{(bl|b)}} log10
85 %1 = call double @llvm.log10.f64(double %a)
89 declare double @llvm.log2.f64(double %Val)
90 define double @log2_d(double %a) {
91 ; CHECK-LABEL: log2_d:
92 ; SOFT: {{(bl|b)}} log2
94 %1 = call double @llvm.log2.f64(double %a)
98 declare double @llvm.fma.f64(double %a, double %b, double %c)
99 define double @fma_d(double %a, double %b, double %c) {
100 ; CHECK-LABEL: fma_d:
101 ; SOFT: {{(bl|b)}} fma
103 %1 = call double @llvm.fma.f64(double %a, double %b, double %c)
107 ; FIXME: the FPv4-SP version is less efficient than the no-FPU version
108 declare double @llvm.fabs.f64(double %Val)
109 define double @abs_d(double %a) {
110 ; CHECK-LABEL: abs_d:
111 ; NONE: bic r1, r1, #-2147483648
112 ; SP: bl __aeabi_dcmpgt
113 ; SP: bl __aeabi_dcmpun
114 ; SP: bl __aeabi_dsub
115 ; DP: vabs.f64 d0, d0
116 %1 = call double @llvm.fabs.f64(double %a)
120 declare double @llvm.copysign.f64(double %Mag, double %Sgn)
121 define double @copysign_d(double %a, double %b) {
122 ; CHECK-LABEL: copysign_d:
123 ; SOFT: lsrs [[REG:r[0-9]+]], r3, #31
124 ; SOFT: bfi r1, [[REG]], #31, #1
125 ; VFP: lsrs [[REG:r[0-9]+]], r3, #31
126 ; VFP: bfi r1, [[REG]], #31, #1
127 ; NEON: vmov.i32 [[REG:d[0-9]+]], #0x80000000
128 ; NEON: vshl.i64 [[REG]], [[REG]], #32
129 ; NEON: vbsl [[REG]], d
130 %1 = call double @llvm.copysign.f64(double %a, double %b)
134 declare double @llvm.floor.f64(double %Val)
135 define double @floor_d(double %a) {
136 ; CHECK-LABEL: floor_d:
137 ; SOFT: {{(bl|b)}} floor
139 ; FP-ARMv8: vrintm.f64
140 %1 = call double @llvm.floor.f64(double %a)
144 declare double @llvm.ceil.f64(double %Val)
145 define double @ceil_d(double %a) {
146 ; CHECK-LABEL: ceil_d:
147 ; SOFT: {{(bl|b)}} ceil
149 ; FP-ARMv8: vrintp.f64
150 %1 = call double @llvm.ceil.f64(double %a)
154 declare double @llvm.trunc.f64(double %Val)
155 define double @trunc_d(double %a) {
156 ; CHECK-LABEL: trunc_d:
157 ; SOFT: {{(bl|b)}} trunc
159 ; FP-ARMv8: vrintz.f64
160 %1 = call double @llvm.trunc.f64(double %a)
164 declare double @llvm.rint.f64(double %Val)
165 define double @rint_d(double %a) {
166 ; CHECK-LABEL: rint_d:
167 ; SOFT: {{(bl|b)}} rint
169 ; FP-ARMv8: vrintx.f64
170 %1 = call double @llvm.rint.f64(double %a)
174 declare double @llvm.nearbyint.f64(double %Val)
175 define double @nearbyint_d(double %a) {
176 ; CHECK-LABEL: nearbyint_d:
177 ; SOFT: {{(bl|b)}} nearbyint
179 ; FP-ARMv8: vrintr.f64
180 %1 = call double @llvm.nearbyint.f64(double %a)
184 declare double @llvm.round.f64(double %Val)
185 define double @round_d(double %a) {
186 ; CHECK-LABEL: round_d:
187 ; SOFT: {{(bl|b)}} round
189 ; FP-ARMv8: vrinta.f64
190 %1 = call double @llvm.round.f64(double %a)
194 declare double @llvm.fmuladd.f64(double %a, double %b, double %c)
195 define double @fmuladd_d(double %a, double %b, double %c) {
196 ; CHECK-LABEL: fmuladd_d:
197 ; SOFT: bl __aeabi_dmul
198 ; SOFT: bl __aeabi_dadd
202 %1 = call double @llvm.fmuladd.f64(double %a, double %b, double %c)
206 declare i16 @llvm.convert.to.fp16.f64(double %a)
207 define i16 @d_to_h(double %a) {
208 ; CHECK-LABEL: d_to_h:
209 ; SOFT: bl __aeabi_d2h
210 ; VFP4: bl __aeabi_d2h
211 ; FP-ARMv8: vcvt{{[bt]}}.f16.f64
212 %1 = call i16 @llvm.convert.to.fp16.f64(double %a)
216 declare double @llvm.convert.from.fp16.f64(i16 %a)
217 define double @h_to_d(i16 %a) {
218 ; CHECK-LABEL: h_to_d:
219 ; NONE: bl __gnu_h2f_ieee
220 ; NONE: bl __aeabi_f2d
221 ; SP: vcvt{{[bt]}}.f32.f16
223 ; VFPv4: vcvt{{[bt]}}.f32.f16
224 ; VFPv4: vcvt.f64.f32
225 ; FP-ARMv8: vcvt{{[bt]}}.f64.f16
226 %1 = call double @llvm.convert.from.fp16.f64(i16 %a)