1 ; RUN: llc < %s -mtriple=thumbv7-none-eabi -mcpu=cortex-m3 | FileCheck %s -check-prefix=CHECK -check-prefix=SOFT -check-prefix=NONE
2 ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m4 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=SP -check-prefix=VMLA
3 ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m7 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=DP -check-prefix=VFP -check-prefix=FP-ARMv8 -check-prefix=VMLA
4 ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m7 -mattr=+fp-only-sp | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=SP -check-prefix=FP-ARMv8 -check-prefix=VMLA
5 ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-a7 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=DP -check-prefix=NEON -check-prefix=VFP4 -check-prefix=NO-VMLA
6 ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-a57 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=DP -check-prefix=NEON -check-prefix=FP-ARMv8 -check-prefix=VMLA
8 declare float @llvm.sqrt.f32(float %Val)
9 define float @sqrt_f(float %a) {
10 ; CHECK-LABEL: sqrt_f:
12 ; HARD: vsqrt.f32 s0, s0
13 %1 = call float @llvm.sqrt.f32(float %a)
17 declare float @llvm.powi.f32(float %Val, i32 %power)
18 define float @powi_f(float %a, i32 %b) {
19 ; CHECK-LABEL: powi_f:
22 %1 = call float @llvm.powi.f32(float %a, i32 %b)
26 declare float @llvm.sin.f32(float %Val)
27 define float @sin_f(float %a) {
31 %1 = call float @llvm.sin.f32(float %a)
35 declare float @llvm.cos.f32(float %Val)
36 define float @cos_f(float %a) {
40 %1 = call float @llvm.cos.f32(float %a)
44 declare float @llvm.pow.f32(float %Val, float %power)
45 define float @pow_f(float %a, float %b) {
49 %1 = call float @llvm.pow.f32(float %a, float %b)
53 declare float @llvm.exp.f32(float %Val)
54 define float @exp_f(float %a) {
58 %1 = call float @llvm.exp.f32(float %a)
62 declare float @llvm.exp2.f32(float %Val)
63 define float @exp2_f(float %a) {
64 ; CHECK-LABEL: exp2_f:
67 %1 = call float @llvm.exp2.f32(float %a)
71 declare float @llvm.log.f32(float %Val)
72 define float @log_f(float %a) {
76 %1 = call float @llvm.log.f32(float %a)
80 declare float @llvm.log10.f32(float %Val)
81 define float @log10_f(float %a) {
82 ; CHECK-LABEL: log10_f:
85 %1 = call float @llvm.log10.f32(float %a)
89 declare float @llvm.log2.f32(float %Val)
90 define float @log2_f(float %a) {
91 ; CHECK-LABEL: log2_f:
94 %1 = call float @llvm.log2.f32(float %a)
98 declare float @llvm.fma.f32(float %a, float %b, float %c)
99 define float @fma_f(float %a, float %b, float %c) {
100 ; CHECK-LABEL: fma_f:
103 %1 = call float @llvm.fma.f32(float %a, float %b, float %c)
107 declare float @llvm.fabs.f32(float %Val)
108 define float @abs_f(float %a) {
109 ; CHECK-LABEL: abs_f:
110 ; SOFT: bic r0, r0, #-2147483648
112 %1 = call float @llvm.fabs.f32(float %a)
116 declare float @llvm.copysign.f32(float %Mag, float %Sgn)
117 define float @copysign_f(float %a, float %b) {
118 ; CHECK-LABEL: copysign_f:
119 ; NONE: lsrs [[REG:r[0-9]+]], r{{[0-9]+}}, #31
120 ; NONE: bfi r{{[0-9]+}}, [[REG]], #31, #1
121 ; SP: lsrs [[REG:r[0-9]+]], r{{[0-9]+}}, #31
122 ; SP: bfi r{{[0-9]+}}, [[REG]], #31, #1
123 ; VFP: lsrs [[REG:r[0-9]+]], r{{[0-9]+}}, #31
124 ; VFP: bfi r{{[0-9]+}}, [[REG]], #31, #1
125 ; NEON: vmov.i32 [[REG:d[0-9]+]], #0x80000000
126 ; NEON: vbsl [[REG]], d
127 %1 = call float @llvm.copysign.f32(float %a, float %b)
131 declare float @llvm.floor.f32(float %Val)
132 define float @floor_f(float %a) {
133 ; CHECK-LABEL: floor_f:
136 ; FP-ARMv8: vrintm.f32
137 %1 = call float @llvm.floor.f32(float %a)
141 declare float @llvm.ceil.f32(float %Val)
142 define float @ceil_f(float %a) {
143 ; CHECK-LABEL: ceil_f:
146 ; FP-ARMv8: vrintp.f32
147 %1 = call float @llvm.ceil.f32(float %a)
151 declare float @llvm.trunc.f32(float %Val)
152 define float @trunc_f(float %a) {
153 ; CHECK-LABEL: trunc_f:
156 ; FP-ARMv8: vrintz.f32
157 %1 = call float @llvm.trunc.f32(float %a)
161 declare float @llvm.rint.f32(float %Val)
162 define float @rint_f(float %a) {
163 ; CHECK-LABEL: rint_f:
166 ; FP-ARMv8: vrintx.f32
167 %1 = call float @llvm.rint.f32(float %a)
171 declare float @llvm.nearbyint.f32(float %Val)
172 define float @nearbyint_f(float %a) {
173 ; CHECK-LABEL: nearbyint_f:
174 ; SOFT: bl nearbyintf
176 ; FP-ARMv8: vrintr.f32
177 %1 = call float @llvm.nearbyint.f32(float %a)
181 declare float @llvm.round.f32(float %Val)
182 define float @round_f(float %a) {
183 ; CHECK-LABEL: round_f:
186 ; FP-ARMv8: vrinta.f32
187 %1 = call float @llvm.round.f32(float %a)
191 ; FIXME: why does cortex-m4 use vmla, while cortex-a7 uses vmul+vadd?
192 ; (these should be equivalent, even the rounding is the same)
193 declare float @llvm.fmuladd.f32(float %a, float %b, float %c)
194 define float @fmuladd_f(float %a, float %b, float %c) {
195 ; CHECK-LABEL: fmuladd_f:
196 ; SOFT: bl __aeabi_fmul
197 ; SOFT: bl __aeabi_fadd
201 %1 = call float @llvm.fmuladd.f32(float %a, float %b, float %c)
205 declare i16 @llvm.convert.to.fp16.f32(float %a)
206 define i16 @f_to_h(float %a) {
207 ; CHECK-LABEL: f_to_h:
208 ; SOFT: bl __gnu_f2h_ieee
209 ; HARD: vcvt{{[bt]}}.f16.f32
210 %1 = call i16 @llvm.convert.to.fp16.f32(float %a)
214 declare float @llvm.convert.from.fp16.f32(i16 %a)
215 define float @h_to_f(i16 %a) {
216 ; CHECK-LABEL: h_to_f:
217 ; SOFT: bl __gnu_h2f_ieee
218 ; HARD: vcvt{{[bt]}}.f32.f16
219 %1 = call float @llvm.convert.from.fp16.f32(i16 %a)