1 ; RUN: llc < %s -mtriple=thumbv7-none-eabi -mcpu=cortex-m3 | FileCheck %s -check-prefix=CHECK -check-prefix=NONE
2 ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m4 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=SP -check-prefix=VFP4-ALL
3 ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-m7 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=DP -check-prefix=FP-ARMv8
4 ; RUN: llc < %s -mtriple=thumbv7-none-eabihf -mcpu=cortex-a8 | FileCheck %s -check-prefix=CHECK -check-prefix=HARD -check-prefix=DP -check-prefix=VFP4-ALL -check-prefix=VFP4-DP
6 define float @add_f(float %a, float %b) {
9 ; NONE: bl __aeabi_fadd
10 ; HARD: vadd.f32 s0, s0, s1
11 %0 = fadd float %a, %b
15 define double @add_d(double %a, double %b) {
18 ; NONE: bl __aeabi_dadd
20 ; DP: vadd.f64 d0, d0, d1
21 %0 = fadd double %a, %b
25 define float @sub_f(float %a, float %b) {
28 ; NONE: bl __aeabi_fsub
30 %0 = fsub float %a, %b
34 define double @sub_d(double %a, double %b) {
37 ; NONE: bl __aeabi_dsub
39 ; DP: vsub.f64 d0, d0, d1
40 %0 = fsub double %a, %b
44 define float @mul_f(float %a, float %b) {
47 ; NONE: bl __aeabi_fmul
49 %0 = fmul float %a, %b
53 define double @mul_d(double %a, double %b) {
56 ; NONE: bl __aeabi_dmul
58 ; DP: vmul.f64 d0, d0, d1
59 %0 = fmul double %a, %b
63 define float @div_f(float %a, float %b) {
66 ; NONE: bl __aeabi_fdiv
68 %0 = fdiv float %a, %b
72 define double @div_d(double %a, double %b) {
75 ; NONE: bl __aeabi_ddiv
77 ; DP: vdiv.f64 d0, d0, d1
78 %0 = fdiv double %a, %b
82 define float @rem_f(float %a, float %b) {
87 %0 = frem float %a, %b
91 define double @rem_d(double %a, double %b) {
96 %0 = frem double %a, %b
100 define float @load_f(float* %a) {
102 ; CHECK-LABEL: load_f:
104 ; HARD: vldr s0, [r0]
105 %0 = load float, float* %a, align 4
109 define double @load_d(double* %a) {
111 ; CHECK-LABEL: load_d:
112 ; NONE: ldm.w r0, {r0, r1}
113 ; HARD: vldr d0, [r0]
114 %0 = load double, double* %a, align 8
118 define void @store_f(float* %a, float %b) {
120 ; CHECK-LABEL: store_f:
122 ; HARD: vstr s0, [r0]
123 store float %b, float* %a, align 4
127 define void @store_d(double* %a, double %b) {
129 ; CHECK-LABEL: store_d:
132 ; NONE: str r1, [r0, #4]
133 ; HARD: vstr d0, [r0]
134 store double %b, double* %a, align 8
138 define double @f_to_d(float %a) {
139 ; CHECK-LABEL: f_to_d:
140 ; NONE: bl __aeabi_f2d
142 ; DP: vcvt.f64.f32 d0, s0
143 %1 = fpext float %a to double
147 define float @d_to_f(double %a) {
148 ; CHECK-LABEL: d_to_f:
149 ; NONE: bl __aeabi_d2f
151 ; DP: vcvt.f32.f64 s0, d0
152 %1 = fptrunc double %a to float
156 define i32 @f_to_si(float %a) {
157 ; CHECK-LABEL: f_to_si:
158 ; NONE: bl __aeabi_f2iz
159 ; HARD: vcvt.s32.f32 s0, s0
161 %1 = fptosi float %a to i32
165 define i32 @d_to_si(double %a) {
166 ; CHECK-LABEL: d_to_si:
167 ; NONE: bl __aeabi_d2iz
168 ; SP: vmov r0, r1, d0
169 ; SP: bl __aeabi_d2iz
170 ; DP: vcvt.s32.f64 s0, d0
172 %1 = fptosi double %a to i32
176 define i32 @f_to_ui(float %a) {
177 ; CHECK-LABEL: f_to_ui:
178 ; NONE: bl __aeabi_f2uiz
179 ; HARD: vcvt.u32.f32 s0, s0
181 %1 = fptoui float %a to i32
185 define i32 @d_to_ui(double %a) {
186 ; CHECK-LABEL: d_to_ui:
187 ; NONE: bl __aeabi_d2uiz
188 ; SP: vmov r0, r1, d0
189 ; SP: bl __aeabi_d2uiz
190 ; DP: vcvt.u32.f64 s0, d0
192 %1 = fptoui double %a to i32
196 define float @si_to_f(i32 %a) {
197 ; CHECK-LABEL: si_to_f:
198 ; NONE: bl __aeabi_i2f
199 ; HARD: vcvt.f32.s32 s0, s0
200 %1 = sitofp i32 %a to float
204 define double @si_to_d(i32 %a) {
205 ; CHECK-LABEL: si_to_d:
206 ; NONE: bl __aeabi_i2d
208 ; DP: vcvt.f64.s32 d0, s0
209 %1 = sitofp i32 %a to double
213 define float @ui_to_f(i32 %a) {
214 ; CHECK-LABEL: ui_to_f:
215 ; NONE: bl __aeabi_ui2f
216 ; HARD: vcvt.f32.u32 s0, s0
217 %1 = uitofp i32 %a to float
221 define double @ui_to_d(i32 %a) {
222 ; CHECK-LABEL: ui_to_d:
223 ; NONE: bl __aeabi_ui2d
224 ; SP: bl __aeabi_ui2d
225 ; DP: vcvt.f64.u32 d0, s0
226 %1 = uitofp i32 %a to double
230 define float @bitcast_i_to_f(i32 %a) {
231 ; CHECK-LABEL: bitcast_i_to_f:
234 %1 = bitcast i32 %a to float
238 define double @bitcast_i_to_d(i64 %a) {
239 ; CHECK-LABEL: bitcast_i_to_d:
241 ; HARD: vmov d0, r0, r1
242 %1 = bitcast i64 %a to double
246 define i32 @bitcast_f_to_i(float %a) {
247 ; CHECK-LABEL: bitcast_f_to_i:
250 %1 = bitcast float %a to i32
254 define i64 @bitcast_d_to_i(double %a) {
255 ; CHECK-LABEL: bitcast_d_to_i:
257 ; HARD: vmov r0, r1, d0
258 %1 = bitcast double %a to i64
262 define float @select_f(float %a, float %b, i1 %c) {
263 ; CHECK-LABEL: select_f:
267 ; VFP4-ALL: vmovne.f32 s1, s0
268 ; VFP4-ALL: vmov.f32 s0, s1
269 ; FP-ARMv8: vseleq.f32 s0, s1, s0
270 %1 = select i1 %c, float %a, float %b
274 define double @select_d(double %a, double %b, i1 %c) {
275 ; CHECK-LABEL: select_d:
276 ; NONE: ldr.w [[REG:r[0-9]+]], [sp]
277 ; NONE: ands [[REG]], [[REG]], #1
280 ; SP: ands r0, r0, #1
281 ; SP-DAG: vmov [[ALO:r[0-9]+]], [[AHI:r[0-9]+]], d0
282 ; SP-DAG: vmov [[BLO:r[0-9]+]], [[BHI:r[0-9]+]], d1
284 ; SP-DAG: movne [[BLO]], [[ALO]]
285 ; SP-DAG: movne [[BHI]], [[AHI]]
286 ; SP: vmov d0, [[BLO]], [[BHI]]
288 ; VFP4-DP: vmovne.f64 d1, d0
289 ; VFP4-DP: vmov.f64 d0, d1
290 ; FP-ARMV8: vseleq.f64 d0, d1, d0
291 %1 = select i1 %c, double %a, double %b