1 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -relocation-model=pic -disable-fp-elim | FileCheck %s
3 ; Make sure we use "str r9, [sp, #+28]" instead of "sub.w r4, r7, #256" followed by "str r9, [r4, #-32]".
5 %0 = type { i16, i8, i8 }
6 %1 = type { [2 x i32], [2 x i32] }
7 %2 = type { %union.rec* }
8 %struct.FILE_POS = type { i8, i8, i16, i32 }
9 %struct.GAP = type { i8, i8, i16 }
10 %struct.LIST = type { %union.rec*, %union.rec* }
11 %struct.STYLE = type { %union.anon, %union.anon, i16, i16, i32 }
12 %struct.head_type = type { [2 x %struct.LIST], %union.FIRST_UNION, %union.SECOND_UNION, %union.THIRD_UNION, %union.FOURTH_UNION, %union.rec*, %2, %union.rec*, %union.rec*, %union.rec*, %union.rec*, %union.rec*, %union.rec*, %union.rec*, %union.rec*, i32 }
13 %union.FIRST_UNION = type { %struct.FILE_POS }
14 %union.FOURTH_UNION = type { %struct.STYLE }
15 %union.SECOND_UNION = type { %0 }
16 %union.THIRD_UNION = type { %1 }
17 %union.anon = type { %struct.GAP }
18 %union.rec = type { %struct.head_type }
20 @zz_hold = external global %union.rec* ; <%union.rec**> [#uses=2]
21 @zz_res = external global %union.rec* ; <%union.rec**> [#uses=1]
23 define arm_apcscc %union.rec* @Manifest(%union.rec* %x, %union.rec* %env, %struct.STYLE* %style, %union.rec** %bthr, %union.rec** %fthr, %union.rec** %target, %union.rec** %crs, i32 %ok, i32 %need_expand, %union.rec** %enclose, i32 %fcr) nounwind {
25 ; CHECK: ldr.w r9, [r7, #+28]
26 %xgaps.i = alloca [32 x %union.rec*], align 4 ; <[32 x %union.rec*]*> [#uses=0]
27 %ycomp.i = alloca [32 x %union.rec*], align 4 ; <[32 x %union.rec*]*> [#uses=0]
28 br i1 false, label %bb, label %bb20
33 bb20: ; preds = %entry
34 switch i32 undef, label %bb1287 [
47 bb119: ; preds = %bb20, %bb20
50 bb420: ; preds = %bb20, %bb20
52 ; CHECK: str r{{[0-7]}}, [sp]
53 ; CHECK: str r{{[0-7]}}, [sp, #+4]
54 ; CHECK: str r{{[0-7]}}, [sp, #+8]
55 ; CHECK: str r{{[0-7]}}, [sp, #+24]
56 store %union.rec* null, %union.rec** @zz_hold, align 4
57 store %union.rec* null, %union.rec** @zz_res, align 4
58 store %union.rec* %x, %union.rec** @zz_hold, align 4
59 %0 = call arm_apcscc %union.rec* @Manifest(%union.rec* undef, %union.rec* %env, %struct.STYLE* %style, %union.rec** %bthr, %union.rec** %fthr, %union.rec** %target, %union.rec** %crs, i32 %ok, i32 %need_expand, %union.rec** %enclose, i32 %fcr) nounwind ; <%union.rec*> [#uses=0]
62 bb438: ; preds = %bb20, %bb20
65 bb533: ; preds = %bb20
68 bb569: ; preds = %bb20
71 bb745: ; preds = %bb20
74 bb1098: ; preds = %bb20
77 bb1287: ; preds = %bb20