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Verify that llvm can generate the prefetchw instruction when the CPU is
[oota-llvm.git]
/
test
/
CodeGen
/
X86
/
2009-06-05-sitofpCrash.ll
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; RUN: llc < %s -march=x86 -mattr=+sse
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; PR2598
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define <2 x float> @a(<2 x i32> %i) nounwind {
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%r = sitofp <2 x i32> %i to <2 x float>
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ret <2 x float> %r
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}
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define <2 x i32> @b(<2 x float> %i) nounwind {
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%r = fptosi <2 x float> %i to <2 x i32>
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ret <2 x i32> %r
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}
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