1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 -mattr=+avx | FileCheck %s
2 ; rdar://11314175: SD Scheduler, BuildSchedUnits assert:
3 ; N->getNodeId() == -1 && "Node already inserted!
5 ; It's hard to test for the ISEL condition because CodeGen optimizes
6 ; away the bugpointed code. Just ensure the basics are still there.
15 define void @func() nounwind ssp {
16 %tmp = load <4 x float>* null, align 1
17 %tmp14 = getelementptr <4 x float>* null, i32 2
18 %tmp15 = load <4 x float>* %tmp14, align 1
19 %tmp16 = shufflevector <4 x float> %tmp, <4 x float> <float 0.000000e+00, float undef, float undef, float undef>, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4>
20 %tmp17 = call <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float> %tmp16, <4 x float> undef, i8 1)
21 %tmp18 = bitcast <4 x float> %tmp to <16 x i8>
22 %tmp19 = shufflevector <16 x i8> %tmp18, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>
23 %tmp20 = bitcast <16 x i8> %tmp19 to <4 x float>
24 %tmp21 = bitcast <4 x float> %tmp15 to <16 x i8>
25 %tmp22 = shufflevector <16 x i8> undef, <16 x i8> %tmp21, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19>
26 %tmp23 = bitcast <16 x i8> %tmp22 to <4 x float>
27 %tmp24 = shufflevector <4 x float> %tmp20, <4 x float> <float 0.000000e+00, float undef, float undef, float undef>, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4>
28 %tmp25 = call <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float> %tmp24, <4 x float> %tmp23, i8 1)
29 %tmp26 = fmul <8 x float> %tmp17, undef
30 %tmp27 = fmul <8 x float> %tmp25, undef
31 %tmp28 = fadd <8 x float> %tmp26, %tmp27
32 %tmp29 = fadd <8 x float> %tmp28, undef
33 %tmp30 = shufflevector <8 x float> %tmp29, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
34 %tmp31 = fmul <4 x float> undef, %tmp30
35 %tmp32 = call <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float> zeroinitializer, <4 x float> %tmp31, i8 1)
36 %tmp33 = fadd <8 x float> undef, %tmp32
37 %tmp34 = call <8 x float> @llvm.x86.avx.hadd.ps.256(<8 x float> %tmp33, <8 x float> undef) nounwind
38 %tmp35 = fsub <8 x float> %tmp34, undef
39 %tmp36 = call <8 x float> @llvm.x86.avx.hadd.ps.256(<8 x float> zeroinitializer, <8 x float> %tmp35) nounwind
40 store <8 x float> %tmp36, <8 x float>* undef, align 32
44 declare <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float>, <4 x float>, i8) nounwind readnone
46 declare <8 x float> @llvm.x86.avx.hadd.ps.256(<8 x float>, <8 x float>) nounwind readnone