1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
4 define <4 x double> @andpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp {
5 ; CHECK-LABEL: andpd256:
6 ; CHECK: # BB#0: # %entry
7 ; CHECK-NEXT: vandpd %ymm0, %ymm1, %ymm0
8 ; CHECK-NEXT: vxorpd %ymm1, %ymm1, %ymm1
9 ; CHECK-NEXT: vaddpd %ymm1, %ymm0, %ymm0
12 %0 = bitcast <4 x double> %x to <4 x i64>
13 %1 = bitcast <4 x double> %y to <4 x i64>
14 %and.i = and <4 x i64> %0, %1
15 %2 = bitcast <4 x i64> %and.i to <4 x double>
16 ; add forces execution domain
17 %3 = fadd <4 x double> %2, <double 0x0, double 0x0, double 0x0, double 0x0>
21 define <4 x double> @andpd256fold(<4 x double> %y) nounwind uwtable readnone ssp {
22 ; CHECK-LABEL: andpd256fold:
23 ; CHECK: # BB#0: # %entry
24 ; CHECK-NEXT: vandpd {{.*}}(%rip), %ymm0, %ymm0
25 ; CHECK-NEXT: vxorpd %ymm1, %ymm1, %ymm1
26 ; CHECK-NEXT: vaddpd %ymm1, %ymm0, %ymm0
29 %0 = bitcast <4 x double> %y to <4 x i64>
30 %and.i = and <4 x i64> %0, <i64 4616752568008179712, i64 4614838538166547251, i64 4612361558371493478, i64 4608083138725491507>
31 %1 = bitcast <4 x i64> %and.i to <4 x double>
32 ; add forces execution domain
33 %2 = fadd <4 x double> %1, <double 0x0, double 0x0, double 0x0, double 0x0>
37 define <8 x float> @andps256(<8 x float> %y, <8 x float> %x) nounwind uwtable readnone ssp {
38 ; CHECK-LABEL: andps256:
39 ; CHECK: # BB#0: # %entry
40 ; CHECK-NEXT: vandps %ymm0, %ymm1, %ymm0
43 %0 = bitcast <8 x float> %x to <8 x i32>
44 %1 = bitcast <8 x float> %y to <8 x i32>
45 %and.i = and <8 x i32> %0, %1
46 %2 = bitcast <8 x i32> %and.i to <8 x float>
50 define <8 x float> @andps256fold(<8 x float> %y) nounwind uwtable readnone ssp {
51 ; CHECK-LABEL: andps256fold:
52 ; CHECK: # BB#0: # %entry
53 ; CHECK-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0
56 %0 = bitcast <8 x float> %y to <8 x i32>
57 %and.i = and <8 x i32> %0, <i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938, i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938>
58 %1 = bitcast <8 x i32> %and.i to <8 x float>
62 define <4 x double> @xorpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp {
63 ; CHECK-LABEL: xorpd256:
64 ; CHECK: # BB#0: # %entry
65 ; CHECK-NEXT: vxorpd %ymm0, %ymm1, %ymm0
66 ; CHECK-NEXT: vxorpd %ymm1, %ymm1, %ymm1
67 ; CHECK-NEXT: vaddpd %ymm1, %ymm0, %ymm0
70 %0 = bitcast <4 x double> %x to <4 x i64>
71 %1 = bitcast <4 x double> %y to <4 x i64>
72 %xor.i = xor <4 x i64> %0, %1
73 %2 = bitcast <4 x i64> %xor.i to <4 x double>
74 ; add forces execution domain
75 %3 = fadd <4 x double> %2, <double 0x0, double 0x0, double 0x0, double 0x0>
79 define <4 x double> @xorpd256fold(<4 x double> %y) nounwind uwtable readnone ssp {
80 ; CHECK-LABEL: xorpd256fold:
81 ; CHECK: # BB#0: # %entry
82 ; CHECK-NEXT: vxorpd {{.*}}(%rip), %ymm0, %ymm0
83 ; CHECK-NEXT: vxorpd %ymm1, %ymm1, %ymm1
84 ; CHECK-NEXT: vaddpd %ymm1, %ymm0, %ymm0
87 %0 = bitcast <4 x double> %y to <4 x i64>
88 %xor.i = xor <4 x i64> %0, <i64 4616752568008179712, i64 4614838538166547251, i64 4612361558371493478, i64 4608083138725491507>
89 %1 = bitcast <4 x i64> %xor.i to <4 x double>
90 ; add forces execution domain
91 %2 = fadd <4 x double> %1, <double 0x0, double 0x0, double 0x0, double 0x0>
95 define <8 x float> @xorps256(<8 x float> %y, <8 x float> %x) nounwind uwtable readnone ssp {
96 ; CHECK-LABEL: xorps256:
97 ; CHECK: # BB#0: # %entry
98 ; CHECK-NEXT: vxorps %ymm0, %ymm1, %ymm0
101 %0 = bitcast <8 x float> %x to <8 x i32>
102 %1 = bitcast <8 x float> %y to <8 x i32>
103 %xor.i = xor <8 x i32> %0, %1
104 %2 = bitcast <8 x i32> %xor.i to <8 x float>
108 define <8 x float> @xorps256fold(<8 x float> %y) nounwind uwtable readnone ssp {
109 ; CHECK-LABEL: xorps256fold:
110 ; CHECK: # BB#0: # %entry
111 ; CHECK-NEXT: vxorps {{.*}}(%rip), %ymm0, %ymm0
114 %0 = bitcast <8 x float> %y to <8 x i32>
115 %xor.i = xor <8 x i32> %0, <i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938, i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938>
116 %1 = bitcast <8 x i32> %xor.i to <8 x float>
120 define <4 x double> @orpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp {
121 ; CHECK-LABEL: orpd256:
122 ; CHECK: # BB#0: # %entry
123 ; CHECK-NEXT: vorpd %ymm0, %ymm1, %ymm0
124 ; CHECK-NEXT: vxorpd %ymm1, %ymm1, %ymm1
125 ; CHECK-NEXT: vaddpd %ymm1, %ymm0, %ymm0
128 %0 = bitcast <4 x double> %x to <4 x i64>
129 %1 = bitcast <4 x double> %y to <4 x i64>
130 %or.i = or <4 x i64> %0, %1
131 %2 = bitcast <4 x i64> %or.i to <4 x double>
132 ; add forces execution domain
133 %3 = fadd <4 x double> %2, <double 0x0, double 0x0, double 0x0, double 0x0>
137 define <4 x double> @orpd256fold(<4 x double> %y) nounwind uwtable readnone ssp {
138 ; CHECK-LABEL: orpd256fold:
139 ; CHECK: # BB#0: # %entry
140 ; CHECK-NEXT: vorpd {{.*}}(%rip), %ymm0, %ymm0
141 ; CHECK-NEXT: vxorpd %ymm1, %ymm1, %ymm1
142 ; CHECK-NEXT: vaddpd %ymm1, %ymm0, %ymm0
145 %0 = bitcast <4 x double> %y to <4 x i64>
146 %or.i = or <4 x i64> %0, <i64 4616752568008179712, i64 4614838538166547251, i64 4612361558371493478, i64 4608083138725491507>
147 %1 = bitcast <4 x i64> %or.i to <4 x double>
148 ; add forces execution domain
149 %2 = fadd <4 x double> %1, <double 0x0, double 0x0, double 0x0, double 0x0>
153 define <8 x float> @orps256(<8 x float> %y, <8 x float> %x) nounwind uwtable readnone ssp {
154 ; CHECK-LABEL: orps256:
155 ; CHECK: # BB#0: # %entry
156 ; CHECK-NEXT: vorps %ymm0, %ymm1, %ymm0
159 %0 = bitcast <8 x float> %x to <8 x i32>
160 %1 = bitcast <8 x float> %y to <8 x i32>
161 %or.i = or <8 x i32> %0, %1
162 %2 = bitcast <8 x i32> %or.i to <8 x float>
166 define <8 x float> @orps256fold(<8 x float> %y) nounwind uwtable readnone ssp {
167 ; CHECK-LABEL: orps256fold:
168 ; CHECK: # BB#0: # %entry
169 ; CHECK-NEXT: vorps {{.*}}(%rip), %ymm0, %ymm0
172 %0 = bitcast <8 x float> %y to <8 x i32>
173 %or.i = or <8 x i32> %0, <i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938, i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938>
174 %1 = bitcast <8 x i32> %or.i to <8 x float>
178 define <4 x double> @andnotpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp {
179 ; CHECK-LABEL: andnotpd256:
180 ; CHECK: # BB#0: # %entry
181 ; CHECK-NEXT: vandnpd %ymm0, %ymm1, %ymm0
182 ; CHECK-NEXT: vxorpd %ymm1, %ymm1, %ymm1
183 ; CHECK-NEXT: vaddpd %ymm1, %ymm0, %ymm0
186 %0 = bitcast <4 x double> %x to <4 x i64>
187 %neg.i = xor <4 x i64> %0, <i64 -1, i64 -1, i64 -1, i64 -1>
188 %1 = bitcast <4 x double> %y to <4 x i64>
189 %and.i = and <4 x i64> %1, %neg.i
190 %2 = bitcast <4 x i64> %and.i to <4 x double>
191 ; add forces execution domain
192 %3 = fadd <4 x double> %2, <double 0x0, double 0x0, double 0x0, double 0x0>
196 define <4 x double> @andnotpd256fold(<4 x double> %y, <4 x double>* nocapture %x) nounwind uwtable readonly ssp {
197 ; CHECK-LABEL: andnotpd256fold:
198 ; CHECK: # BB#0: # %entry
199 ; CHECK-NEXT: vandnpd (%rdi), %ymm0, %ymm0
200 ; CHECK-NEXT: vxorpd %ymm1, %ymm1, %ymm1
201 ; CHECK-NEXT: vaddpd %ymm1, %ymm0, %ymm0
204 %tmp2 = load <4 x double>, <4 x double>* %x, align 32
205 %0 = bitcast <4 x double> %y to <4 x i64>
206 %neg.i = xor <4 x i64> %0, <i64 -1, i64 -1, i64 -1, i64 -1>
207 %1 = bitcast <4 x double> %tmp2 to <4 x i64>
208 %and.i = and <4 x i64> %1, %neg.i
209 %2 = bitcast <4 x i64> %and.i to <4 x double>
210 ; add forces execution domain
211 %3 = fadd <4 x double> %2, <double 0x0, double 0x0, double 0x0, double 0x0>
215 define <8 x float> @andnotps256(<8 x float> %y, <8 x float> %x) nounwind uwtable readnone ssp {
216 ; CHECK-LABEL: andnotps256:
217 ; CHECK: # BB#0: # %entry
218 ; CHECK-NEXT: vandnps %ymm0, %ymm1, %ymm0
221 %0 = bitcast <8 x float> %x to <8 x i32>
222 %neg.i = xor <8 x i32> %0, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>
223 %1 = bitcast <8 x float> %y to <8 x i32>
224 %and.i = and <8 x i32> %1, %neg.i
225 %2 = bitcast <8 x i32> %and.i to <8 x float>
229 define <8 x float> @andnotps256fold(<8 x float> %y, <8 x float>* nocapture %x) nounwind uwtable readonly ssp {
230 ; CHECK-LABEL: andnotps256fold:
231 ; CHECK: # BB#0: # %entry
232 ; CHECK-NEXT: vandnps (%rdi), %ymm0, %ymm0
235 %tmp2 = load <8 x float>, <8 x float>* %x, align 32
236 %0 = bitcast <8 x float> %y to <8 x i32>
237 %neg.i = xor <8 x i32> %0, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>
238 %1 = bitcast <8 x float> %tmp2 to <8 x i32>
239 %and.i = and <8 x i32> %1, %neg.i
240 %2 = bitcast <8 x i32> %and.i to <8 x float>
244 ;;; Test that basic 2 x i64 logic use the integer version on AVX
246 define <2 x i64> @vpandn(<2 x i64> %a, <2 x i64> %b) nounwind uwtable readnone ssp {
247 ; CHECK-LABEL: vpandn:
248 ; CHECK: # BB#0: # %entry
249 ; CHECK-NEXT: vpaddq {{.*}}(%rip), %xmm0, %xmm1
250 ; CHECK-NEXT: vpandn %xmm0, %xmm1, %xmm0
253 ; Force the execution domain with an add.
254 %a2 = add <2 x i64> %a, <i64 1, i64 1>
255 %y = xor <2 x i64> %a2, <i64 -1, i64 -1>
256 %x = and <2 x i64> %a, %y
260 define <2 x i64> @vpand(<2 x i64> %a, <2 x i64> %b) nounwind uwtable readnone ssp {
261 ; CHECK-LABEL: vpand:
262 ; CHECK: # BB#0: # %entry
263 ; CHECK-NEXT: vpaddq {{.*}}(%rip), %xmm0, %xmm0
264 ; CHECK-NEXT: vpand %xmm1, %xmm0, %xmm0
267 ; Force the execution domain with an add.
268 %a2 = add <2 x i64> %a, <i64 1, i64 1>
269 %x = and <2 x i64> %a2, %b