1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck %s -check-prefix=AVX
2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core2 | FileCheck %s -check-prefix=SSSE3
3 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=pentium4 | FileCheck %s -check-prefix=SSE2
5 define <8 x i32> @sext_8i16_to_8i32(<8 x i16> %A) nounwind uwtable readnone ssp {
6 ; AVX: sext_8i16_to_8i32
9 %B = sext <8 x i16> %A to <8 x i32>
13 define <4 x i64> @sext_4i32_to_4i64(<4 x i32> %A) nounwind uwtable readnone ssp {
14 ; AVX: sext_4i32_to_4i64
17 %B = sext <4 x i32> %A to <4 x i64>
21 ; AVX: load_sext_test1
22 ; AVX: vpmovsxwd (%r{{[^,]*}}), %xmm{{.*}}
25 ; SSSE3: load_sext_test1
27 ; SSSE3: punpcklwd %xmm{{.*}}, %xmm{{.*}}
31 ; SSE2: load_sext_test1
33 ; SSE2: punpcklwd %xmm{{.*}}, %xmm{{.*}}
36 define <4 x i32> @load_sext_test1(<4 x i16> *%ptr) {
37 %X = load <4 x i16>* %ptr
38 %Y = sext <4 x i16> %X to <4 x i32>
42 ; AVX: load_sext_test2
43 ; AVX: vpmovsxbd (%r{{[^,]*}}), %xmm{{.*}}
46 ; SSSE3: load_sext_test2
52 ; SSE2: load_sext_test2
56 define <4 x i32> @load_sext_test2(<4 x i8> *%ptr) {
57 %X = load <4 x i8>* %ptr
58 %Y = sext <4 x i8> %X to <4 x i32>
62 ; AVX: load_sext_test3
63 ; AVX: vpmovsxbq (%r{{[^,]*}}), %xmm{{.*}}
66 ; SSSE3: load_sext_test3
72 ; SSE2: load_sext_test3
77 define <2 x i64> @load_sext_test3(<2 x i8> *%ptr) {
78 %X = load <2 x i8>* %ptr
79 %Y = sext <2 x i8> %X to <2 x i64>
83 ; AVX: load_sext_test4
84 ; AVX: vpmovsxwq (%r{{[^,]*}}), %xmm{{.*}}
87 ; SSSE3: load_sext_test4
93 ; SSE2: load_sext_test4
98 define <2 x i64> @load_sext_test4(<2 x i16> *%ptr) {
99 %X = load <2 x i16>* %ptr
100 %Y = sext <2 x i16> %X to <2 x i64>
104 ; AVX: load_sext_test5
105 ; AVX: vpmovsxdq (%r{{[^,]*}}), %xmm{{.*}}
108 ; SSSE3: load_sext_test5
114 ; SSE2: load_sext_test5
119 define <2 x i64> @load_sext_test5(<2 x i32> *%ptr) {
120 %X = load <2 x i32>* %ptr
121 %Y = sext <2 x i32> %X to <2 x i64>
125 ; AVX: load_sext_test6
126 ; AVX: vpmovsxbw (%r{{[^,]*}}), %xmm{{.*}}
129 ; SSSE3: load_sext_test6
135 ; SSE2: load_sext_test6
140 define <8 x i16> @load_sext_test6(<8 x i8> *%ptr) {
141 %X = load <8 x i8>* %ptr
142 %Y = sext <8 x i8> %X to <8 x i16>
146 ; AVX: sext_4i1_to_4i64
152 define <4 x i64> @sext_4i1_to_4i64(<4 x i1> %mask) {
153 %extmask = sext <4 x i1> %mask to <4 x i64>
154 ret <4 x i64> %extmask
157 ; AVX-LABEL: sext_16i8_to_16i16
162 define <16 x i16> @sext_16i8_to_16i16(<16 x i8> *%ptr) {
163 %X = load <16 x i8>* %ptr
164 %Y = sext <16 x i8> %X to <16 x i16>
168 ; AVX: sext_4i8_to_4i64
174 define <4 x i64> @sext_4i8_to_4i64(<4 x i8> %mask) {
175 %extmask = sext <4 x i8> %mask to <4 x i64>
176 ret <4 x i64> %extmask
179 ; AVX: sext_4i8_to_4i64
184 define <4 x i64> @load_sext_4i8_to_4i64(<4 x i8> *%ptr) {
185 %X = load <4 x i8>* %ptr
186 %Y = sext <4 x i8> %X to <4 x i64>
190 ; AVX: sext_4i16_to_4i64
195 define <4 x i64> @load_sext_4i16_to_4i64(<4 x i16> *%ptr) {
196 %X = load <4 x i16>* %ptr
197 %Y = sext <4 x i16> %X to <4 x i64>