1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s
4 define <4 x i64> @A(i64* %ptr) nounwind uwtable readnone ssp {
6 ; CHECK: ## BB#0: ## %entry
7 ; CHECK-NEXT: vbroadcastsd (%rdi), %ymm0
10 %q = load i64, i64* %ptr, align 8
11 %vecinit.i = insertelement <4 x i64> undef, i64 %q, i32 0
12 %vecinit2.i = insertelement <4 x i64> %vecinit.i, i64 %q, i32 1
13 %vecinit4.i = insertelement <4 x i64> %vecinit2.i, i64 %q, i32 2
14 %vecinit6.i = insertelement <4 x i64> %vecinit4.i, i64 %q, i32 3
15 ret <4 x i64> %vecinit6.i
18 define <8 x i32> @B(i32* %ptr) nounwind uwtable readnone ssp {
20 ; CHECK: ## BB#0: ## %entry
21 ; CHECK-NEXT: vbroadcastss (%rdi), %ymm0
24 %q = load i32, i32* %ptr, align 4
25 %vecinit.i = insertelement <8 x i32> undef, i32 %q, i32 0
26 %vecinit2.i = insertelement <8 x i32> %vecinit.i, i32 %q, i32 1
27 %vecinit4.i = insertelement <8 x i32> %vecinit2.i, i32 %q, i32 2
28 %vecinit6.i = insertelement <8 x i32> %vecinit4.i, i32 %q, i32 3
29 ret <8 x i32> %vecinit6.i
32 define <4 x double> @C(double* %ptr) nounwind uwtable readnone ssp {
34 ; CHECK: ## BB#0: ## %entry
35 ; CHECK-NEXT: vbroadcastsd (%rdi), %ymm0
38 %q = load double, double* %ptr, align 8
39 %vecinit.i = insertelement <4 x double> undef, double %q, i32 0
40 %vecinit2.i = insertelement <4 x double> %vecinit.i, double %q, i32 1
41 %vecinit4.i = insertelement <4 x double> %vecinit2.i, double %q, i32 2
42 %vecinit6.i = insertelement <4 x double> %vecinit4.i, double %q, i32 3
43 ret <4 x double> %vecinit6.i
46 define <8 x float> @D(float* %ptr) nounwind uwtable readnone ssp {
48 ; CHECK: ## BB#0: ## %entry
49 ; CHECK-NEXT: vbroadcastss (%rdi), %ymm0
52 %q = load float, float* %ptr, align 4
53 %vecinit.i = insertelement <8 x float> undef, float %q, i32 0
54 %vecinit2.i = insertelement <8 x float> %vecinit.i, float %q, i32 1
55 %vecinit4.i = insertelement <8 x float> %vecinit2.i, float %q, i32 2
56 %vecinit6.i = insertelement <8 x float> %vecinit4.i, float %q, i32 3
57 ret <8 x float> %vecinit6.i
62 define <4 x float> @e(float* %ptr) nounwind uwtable readnone ssp {
64 ; CHECK: ## BB#0: ## %entry
65 ; CHECK-NEXT: vbroadcastss (%rdi), %xmm0
68 %q = load float, float* %ptr, align 4
69 %vecinit.i = insertelement <4 x float> undef, float %q, i32 0
70 %vecinit2.i = insertelement <4 x float> %vecinit.i, float %q, i32 1
71 %vecinit4.i = insertelement <4 x float> %vecinit2.i, float %q, i32 2
72 %vecinit6.i = insertelement <4 x float> %vecinit4.i, float %q, i32 3
73 ret <4 x float> %vecinit6.i
76 ; Don't broadcast constants on pre-AVX2 hardware.
77 define <4 x float> @_e2(float* %ptr) nounwind uwtable readnone ssp {
79 ; CHECK: ## BB#0: ## %entry
80 ; CHECK-NEXT: vmovaps {{.*#+}} xmm0 = [-7.812500e-03,-7.812500e-03,-7.812500e-03,-7.812500e-03]
83 %vecinit.i = insertelement <4 x float> undef, float 0xbf80000000000000, i32 0
84 %vecinit2.i = insertelement <4 x float> %vecinit.i, float 0xbf80000000000000, i32 1
85 %vecinit4.i = insertelement <4 x float> %vecinit2.i, float 0xbf80000000000000, i32 2
86 %vecinit6.i = insertelement <4 x float> %vecinit4.i, float 0xbf80000000000000, i32 3
87 ret <4 x float> %vecinit6.i
91 define <4 x i32> @F(i32* %ptr) nounwind uwtable readnone ssp {
93 ; CHECK: ## BB#0: ## %entry
94 ; CHECK-NEXT: vbroadcastss (%rdi), %xmm0
97 %q = load i32, i32* %ptr, align 4
98 %vecinit.i = insertelement <4 x i32> undef, i32 %q, i32 0
99 %vecinit2.i = insertelement <4 x i32> %vecinit.i, i32 %q, i32 1
100 %vecinit4.i = insertelement <4 x i32> %vecinit2.i, i32 %q, i32 2
101 %vecinit6.i = insertelement <4 x i32> %vecinit4.i, i32 %q, i32 3
102 ret <4 x i32> %vecinit6.i
105 ; FIXME: Pointer adjusted broadcasts
107 define <4 x i32> @load_splat_4i32_4i32_1111(<4 x i32>* %ptr) nounwind uwtable readnone ssp {
108 ; CHECK-LABEL: load_splat_4i32_4i32_1111:
109 ; CHECK: ## BB#0: ## %entry
110 ; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = mem[1,1,1,1]
113 %ld = load <4 x i32>, <4 x i32>* %ptr
114 %ret = shufflevector <4 x i32> %ld, <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
118 define <8 x i32> @load_splat_8i32_4i32_33333333(<4 x i32>* %ptr) nounwind uwtable readnone ssp {
119 ; CHECK-LABEL: load_splat_8i32_4i32_33333333:
120 ; CHECK: ## BB#0: ## %entry
121 ; CHECK-NEXT: vpermilps {{.*#+}} xmm0 = mem[3,3,3,3]
122 ; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
125 %ld = load <4 x i32>, <4 x i32>* %ptr
126 %ret = shufflevector <4 x i32> %ld, <4 x i32> undef, <8 x i32> <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>
130 define <8 x i32> @load_splat_8i32_8i32_55555555(<8 x i32>* %ptr) nounwind uwtable readnone ssp {
131 ; CHECK-LABEL: load_splat_8i32_8i32_55555555:
132 ; CHECK: ## BB#0: ## %entry
133 ; CHECK-NEXT: vmovaps (%rdi), %ymm0
134 ; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm0
135 ; CHECK-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,1,1,1]
136 ; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
139 %ld = load <8 x i32>, <8 x i32>* %ptr
140 %ret = shufflevector <8 x i32> %ld, <8 x i32> undef, <8 x i32> <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5>
144 define <4 x float> @load_splat_4f32_4f32_1111(<4 x float>* %ptr) nounwind uwtable readnone ssp {
145 ; CHECK-LABEL: load_splat_4f32_4f32_1111:
146 ; CHECK: ## BB#0: ## %entry
147 ; CHECK-NEXT: vpermilps {{.*#+}} xmm0 = mem[1,1,1,1]
150 %ld = load <4 x float>, <4 x float>* %ptr
151 %ret = shufflevector <4 x float> %ld, <4 x float> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
155 define <8 x float> @load_splat_8f32_4f32_33333333(<4 x float>* %ptr) nounwind uwtable readnone ssp {
156 ; CHECK-LABEL: load_splat_8f32_4f32_33333333:
157 ; CHECK: ## BB#0: ## %entry
158 ; CHECK-NEXT: vpermilps {{.*#+}} xmm0 = mem[3,3,3,3]
159 ; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
162 %ld = load <4 x float>, <4 x float>* %ptr
163 %ret = shufflevector <4 x float> %ld, <4 x float> undef, <8 x i32> <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>
167 define <8 x float> @load_splat_8f32_8f32_55555555(<8 x float>* %ptr) nounwind uwtable readnone ssp {
168 ; CHECK-LABEL: load_splat_8f32_8f32_55555555:
169 ; CHECK: ## BB#0: ## %entry
170 ; CHECK-NEXT: vmovaps (%rdi), %ymm0
171 ; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm0
172 ; CHECK-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,1,1,1]
173 ; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
176 %ld = load <8 x float>, <8 x float>* %ptr
177 %ret = shufflevector <8 x float> %ld, <8 x float> undef, <8 x i32> <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5>
181 define <2 x i64> @load_splat_2i64_2i64_1111(<2 x i64>* %ptr) nounwind uwtable readnone ssp {
182 ; CHECK-LABEL: load_splat_2i64_2i64_1111:
183 ; CHECK: ## BB#0: ## %entry
184 ; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = mem[2,3,2,3]
187 %ld = load <2 x i64>, <2 x i64>* %ptr
188 %ret = shufflevector <2 x i64> %ld, <2 x i64> undef, <2 x i32> <i32 1, i32 1>
192 define <4 x i64> @load_splat_4i64_2i64_1111(<2 x i64>* %ptr) nounwind uwtable readnone ssp {
193 ; CHECK-LABEL: load_splat_4i64_2i64_1111:
194 ; CHECK: ## BB#0: ## %entry
195 ; CHECK-NEXT: vmovaps (%rdi), %xmm0
196 ; CHECK-NEXT: vmovhlps {{.*#+}} xmm0 = xmm0[1,1]
197 ; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
200 %ld = load <2 x i64>, <2 x i64>* %ptr
201 %ret = shufflevector <2 x i64> %ld, <2 x i64> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
205 define <4 x i64> @load_splat_4i64_4i64_2222(<4 x i64>* %ptr) nounwind uwtable readnone ssp {
206 ; CHECK-LABEL: load_splat_4i64_4i64_2222:
207 ; CHECK: ## BB#0: ## %entry
208 ; CHECK-NEXT: vmovapd (%rdi), %ymm0
209 ; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm0
210 ; CHECK-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
211 ; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
214 %ld = load <4 x i64>, <4 x i64>* %ptr
215 %ret = shufflevector <4 x i64> %ld, <4 x i64> undef, <4 x i32> <i32 2, i32 2, i32 2, i32 2>
219 define <2 x double> @load_splat_2f64_2f64_1111(<2 x double>* %ptr) nounwind uwtable readnone ssp {
220 ; CHECK-LABEL: load_splat_2f64_2f64_1111:
221 ; CHECK: ## BB#0: ## %entry
222 ; CHECK-NEXT: vmovaps (%rdi), %xmm0
223 ; CHECK-NEXT: vmovhlps {{.*#+}} xmm0 = xmm0[1,1]
226 %ld = load <2 x double>, <2 x double>* %ptr
227 %ret = shufflevector <2 x double> %ld, <2 x double> undef, <2 x i32> <i32 1, i32 1>
228 ret <2 x double> %ret
231 define <4 x double> @load_splat_4f64_2f64_1111(<2 x double>* %ptr) nounwind uwtable readnone ssp {
232 ; CHECK-LABEL: load_splat_4f64_2f64_1111:
233 ; CHECK: ## BB#0: ## %entry
234 ; CHECK-NEXT: vmovaps (%rdi), %xmm0
235 ; CHECK-NEXT: vmovhlps {{.*#+}} xmm0 = xmm0[1,1]
236 ; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
239 %ld = load <2 x double>, <2 x double>* %ptr
240 %ret = shufflevector <2 x double> %ld, <2 x double> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
241 ret <4 x double> %ret
244 define <4 x double> @load_splat_4f64_4f64_2222(<4 x double>* %ptr) nounwind uwtable readnone ssp {
245 ; CHECK-LABEL: load_splat_4f64_4f64_2222:
246 ; CHECK: ## BB#0: ## %entry
247 ; CHECK-NEXT: vmovapd (%rdi), %ymm0
248 ; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm0
249 ; CHECK-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
250 ; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
253 %ld = load <4 x double>, <4 x double>* %ptr
254 %ret = shufflevector <4 x double> %ld, <4 x double> undef, <4 x i32> <i32 2, i32 2, i32 2, i32 2>
255 ret <4 x double> %ret
258 ; Unsupported vbroadcasts
260 define <2 x i64> @G(i64* %ptr) nounwind uwtable readnone ssp {
262 ; CHECK: ## BB#0: ## %entry
263 ; CHECK-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
264 ; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
267 %q = load i64, i64* %ptr, align 8
268 %vecinit.i = insertelement <2 x i64> undef, i64 %q, i32 0
269 %vecinit2.i = insertelement <2 x i64> %vecinit.i, i64 %q, i32 1
270 ret <2 x i64> %vecinit2.i
273 define <4 x i32> @H(<4 x i32> %a) {
275 ; CHECK: ## BB#0: ## %entry
276 ; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
279 %x = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
283 define <2 x double> @I(double* %ptr) nounwind uwtable readnone ssp {
285 ; CHECK: ## BB#0: ## %entry
286 ; CHECK-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
289 %q = load double, double* %ptr, align 4
290 %vecinit.i = insertelement <2 x double> undef, double %q, i32 0
291 %vecinit2.i = insertelement <2 x double> %vecinit.i, double %q, i32 1
292 ret <2 x double> %vecinit2.i
295 define <4 x float> @_RR(float* %ptr, i32* %k) nounwind uwtable readnone ssp {
297 ; CHECK: ## BB#0: ## %entry
298 ; CHECK-NEXT: vbroadcastss (%rdi), %xmm0
299 ; CHECK-NEXT: movl (%rsi), %eax
300 ; CHECK-NEXT: movl %eax, (%rax)
303 %q = load float, float* %ptr, align 4
304 %vecinit.i = insertelement <4 x float> undef, float %q, i32 0
305 %vecinit2.i = insertelement <4 x float> %vecinit.i, float %q, i32 1
306 %vecinit4.i = insertelement <4 x float> %vecinit2.i, float %q, i32 2
307 %vecinit6.i = insertelement <4 x float> %vecinit4.i, float %q, i32 3
309 %j = load i32, i32* %k, align 4
310 store i32 %j, i32* undef
311 ret <4 x float> %vecinit6.i
314 define <4 x float> @_RR2(float* %ptr, i32* %k) nounwind uwtable readnone ssp {
316 ; CHECK: ## BB#0: ## %entry
317 ; CHECK-NEXT: vbroadcastss (%rdi), %xmm0
320 %q = load float, float* %ptr, align 4
321 %v = insertelement <4 x float> undef, float %q, i32 0
322 %t = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> zeroinitializer
326 ; These tests check that a vbroadcast instruction is used when we have a splat
327 ; formed from a concat_vectors (via the shufflevector) of two BUILD_VECTORs
328 ; (via the insertelements).
330 define <8 x float> @splat_concat1(float* %p) {
331 ; CHECK-LABEL: splat_concat1:
333 ; CHECK-NEXT: vbroadcastss (%rdi), %ymm0
335 %1 = load float, float* %p, align 4
336 %2 = insertelement <4 x float> undef, float %1, i32 0
337 %3 = insertelement <4 x float> %2, float %1, i32 1
338 %4 = insertelement <4 x float> %3, float %1, i32 2
339 %5 = insertelement <4 x float> %4, float %1, i32 3
340 %6 = shufflevector <4 x float> %5, <4 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
344 define <8 x float> @splat_concat2(float* %p) {
345 ; CHECK-LABEL: splat_concat2:
347 ; CHECK-NEXT: vbroadcastss (%rdi), %ymm0
349 %1 = load float, float* %p, align 4
350 %2 = insertelement <4 x float> undef, float %1, i32 0
351 %3 = insertelement <4 x float> %2, float %1, i32 1
352 %4 = insertelement <4 x float> %3, float %1, i32 2
353 %5 = insertelement <4 x float> %4, float %1, i32 3
354 %6 = insertelement <4 x float> undef, float %1, i32 0
355 %7 = insertelement <4 x float> %6, float %1, i32 1
356 %8 = insertelement <4 x float> %7, float %1, i32 2
357 %9 = insertelement <4 x float> %8, float %1, i32 3
358 %10 = shufflevector <4 x float> %5, <4 x float> %9, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
362 define <4 x double> @splat_concat3(double* %p) {
363 ; CHECK-LABEL: splat_concat3:
365 ; CHECK-NEXT: vbroadcastsd (%rdi), %ymm0
367 %1 = load double, double* %p, align 8
368 %2 = insertelement <2 x double> undef, double %1, i32 0
369 %3 = insertelement <2 x double> %2, double %1, i32 1
370 %4 = shufflevector <2 x double> %3, <2 x double> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
374 define <4 x double> @splat_concat4(double* %p) {
375 ; CHECK-LABEL: splat_concat4:
377 ; CHECK-NEXT: vbroadcastsd (%rdi), %ymm0
379 %1 = load double, double* %p, align 8
380 %2 = insertelement <2 x double> undef, double %1, i32 0
381 %3 = insertelement <2 x double> %2, double %1, i32 1
382 %4 = insertelement <2 x double> undef, double %1, i32 0
383 %5 = insertelement <2 x double> %2, double %1, i32 1
384 %6 = shufflevector <2 x double> %3, <2 x double> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 3>