1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 -mattr=+avx2 | FileCheck %s
6 define <4 x i32> @variable_shl0(<4 x i32> %x, <4 x i32> %y) {
7 %k = shl <4 x i32> %x, %y
10 ; CHECK: variable_shl1
13 define <8 x i32> @variable_shl1(<8 x i32> %x, <8 x i32> %y) {
14 %k = shl <8 x i32> %x, %y
17 ; CHECK: variable_shl2
20 define <2 x i64> @variable_shl2(<2 x i64> %x, <2 x i64> %y) {
21 %k = shl <2 x i64> %x, %y
24 ; CHECK: variable_shl3
27 define <4 x i64> @variable_shl3(<4 x i64> %x, <4 x i64> %y) {
28 %k = shl <4 x i64> %x, %y
31 ; CHECK: variable_srl0
34 define <4 x i32> @variable_srl0(<4 x i32> %x, <4 x i32> %y) {
35 %k = lshr <4 x i32> %x, %y
38 ; CHECK: variable_srl1
41 define <8 x i32> @variable_srl1(<8 x i32> %x, <8 x i32> %y) {
42 %k = lshr <8 x i32> %x, %y
45 ; CHECK: variable_srl2
48 define <2 x i64> @variable_srl2(<2 x i64> %x, <2 x i64> %y) {
49 %k = lshr <2 x i64> %x, %y
52 ; CHECK: variable_srl3
55 define <4 x i64> @variable_srl3(<4 x i64> %x, <4 x i64> %y) {
56 %k = lshr <4 x i64> %x, %y
60 ; CHECK: variable_sra0
63 define <4 x i32> @variable_sra0(<4 x i32> %x, <4 x i32> %y) {
64 %k = ashr <4 x i32> %x, %y
67 ; CHECK: variable_sra1
70 define <8 x i32> @variable_sra1(<8 x i32> %x, <8 x i32> %y) {
71 %k = ashr <8 x i32> %x, %y
77 define <8 x i32> @vshift00(<8 x i32> %a) nounwind readnone {
78 %s = shl <8 x i32> %a, <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32
84 define <16 x i16> @vshift01(<16 x i16> %a) nounwind readnone {
85 %s = shl <16 x i16> %a, <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2>
90 define <4 x i64> @vshift02(<4 x i64> %a) nounwind readnone {
91 %s = shl <4 x i64> %a, <i64 2, i64 2, i64 2, i64 2>
95 ;;; Logical Shift right
97 define <8 x i32> @vshift03(<8 x i32> %a) nounwind readnone {
98 %s = lshr <8 x i32> %a, <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32
104 define <16 x i16> @vshift04(<16 x i16> %a) nounwind readnone {
105 %s = lshr <16 x i16> %a, <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2>
110 define <4 x i64> @vshift05(<4 x i64> %a) nounwind readnone {
111 %s = lshr <4 x i64> %a, <i64 2, i64 2, i64 2, i64 2>
115 ;;; Arithmetic Shift right
117 define <8 x i32> @vshift06(<8 x i32> %a) nounwind readnone {
118 %s = ashr <8 x i32> %a, <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32
124 define <16 x i16> @vshift07(<16 x i16> %a) nounwind readnone {
125 %s = ashr <16 x i16> %a, <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2>
129 ; CHECK: variable_sra0_load
132 define <4 x i32> @variable_sra0_load(<4 x i32> %x, <4 x i32>* %y) {
133 %y1 = load <4 x i32>* %y
134 %k = ashr <4 x i32> %x, %y1
138 ; CHECK: variable_sra1_load
141 define <8 x i32> @variable_sra1_load(<8 x i32> %x, <8 x i32>* %y) {
142 %y1 = load <8 x i32>* %y
143 %k = ashr <8 x i32> %x, %y1
147 ; CHECK: variable_shl0_load
150 define <4 x i32> @variable_shl0_load(<4 x i32> %x, <4 x i32>* %y) {
151 %y1 = load <4 x i32>* %y
152 %k = shl <4 x i32> %x, %y1
155 ; CHECK: variable_shl1_load
158 define <8 x i32> @variable_shl1_load(<8 x i32> %x, <8 x i32>* %y) {
159 %y1 = load <8 x i32>* %y
160 %k = shl <8 x i32> %x, %y1
163 ; CHECK: variable_shl2_load
166 define <2 x i64> @variable_shl2_load(<2 x i64> %x, <2 x i64>* %y) {
167 %y1 = load <2 x i64>* %y
168 %k = shl <2 x i64> %x, %y1
171 ; CHECK: variable_shl3_load
174 define <4 x i64> @variable_shl3_load(<4 x i64> %x, <4 x i64>* %y) {
175 %y1 = load <4 x i64>* %y
176 %k = shl <4 x i64> %x, %y1
179 ; CHECK: variable_srl0_load
182 define <4 x i32> @variable_srl0_load(<4 x i32> %x, <4 x i32>* %y) {
183 %y1 = load <4 x i32>* %y
184 %k = lshr <4 x i32> %x, %y1
187 ; CHECK: variable_srl1_load
190 define <8 x i32> @variable_srl1_load(<8 x i32> %x, <8 x i32>* %y) {
191 %y1 = load <8 x i32>* %y
192 %k = lshr <8 x i32> %x, %y1
195 ; CHECK: variable_srl2_load
198 define <2 x i64> @variable_srl2_load(<2 x i64> %x, <2 x i64>* %y) {
199 %y1 = load <2 x i64>* %y
200 %k = lshr <2 x i64> %x, %y1
203 ; CHECK: variable_srl3_load
206 define <4 x i64> @variable_srl3_load(<4 x i64> %x, <4 x i64>* %y) {
207 %y1 = load <4 x i64>* %y
208 %k = lshr <4 x i64> %x, %y1
212 define <32 x i8> @shl9(<32 x i8> %A) nounwind {
213 %B = shl <32 x i8> %A, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>
221 define <32 x i8> @shr9(<32 x i8> %A) nounwind {
222 %B = lshr <32 x i8> %A, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>
230 define <32 x i8> @sra_v32i8_7(<32 x i8> %A) nounwind {
231 %B = ashr <32 x i8> %A, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
233 ; CHECK-LABEL: sra_v32i8_7:
239 define <32 x i8> @sra_v32i8(<32 x i8> %A) nounwind {
240 %B = ashr <32 x i8> %A, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>
242 ; CHECK-LABEL: sra_v32i8:
250 ; CHECK: _sext_v16i16
253 ; CHECK-NOT: vinsertf128
254 define <16 x i16> @sext_v16i16(<16 x i16> %a) nounwind {
255 %b = trunc <16 x i16> %a to <16 x i8>
256 %c = sext <16 x i8> %b to <16 x i16>
263 ; CHECK-NOT: vinsertf128
264 define <8 x i32> @sext_v8i32(<8 x i32> %a) nounwind {
265 %b = trunc <8 x i32> %a to <8 x i16>
266 %c = sext <8 x i16> %b to <8 x i32>