1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
6 define <16 x i32> @vpandd(<16 x i32> %a, <16 x i32> %b) nounwind uwtable readnone ssp {
8 ; Force the execution domain with an add.
9 %a2 = add <16 x i32> %a, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1,
10 i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
11 %x = and <16 x i32> %a2, %b
18 define <16 x i32> @vpord(<16 x i32> %a, <16 x i32> %b) nounwind uwtable readnone ssp {
20 ; Force the execution domain with an add.
21 %a2 = add <16 x i32> %a, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1,
22 i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
23 %x = or <16 x i32> %a2, %b
30 define <16 x i32> @vpxord(<16 x i32> %a, <16 x i32> %b) nounwind uwtable readnone ssp {
32 ; Force the execution domain with an add.
33 %a2 = add <16 x i32> %a, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1,
34 i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
35 %x = xor <16 x i32> %a2, %b
42 define <8 x i64> @vpandq(<8 x i64> %a, <8 x i64> %b) nounwind uwtable readnone ssp {
44 ; Force the execution domain with an add.
45 %a2 = add <8 x i64> %a, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>
46 %x = and <8 x i64> %a2, %b
53 define <8 x i64> @vporq(<8 x i64> %a, <8 x i64> %b) nounwind uwtable readnone ssp {
55 ; Force the execution domain with an add.
56 %a2 = add <8 x i64> %a, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>
57 %x = or <8 x i64> %a2, %b
64 define <8 x i64> @vpxorq(<8 x i64> %a, <8 x i64> %b) nounwind uwtable readnone ssp {
66 ; Force the execution domain with an add.
67 %a2 = add <8 x i64> %a, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>
68 %x = xor <8 x i64> %a2, %b
73 ; CHECK-LABEL: orq_broadcast
74 ; CHECK: vporq LCP{{.*}}(%rip){1to8}, %zmm0, %zmm0
76 define <8 x i64> @orq_broadcast(<8 x i64> %a) nounwind {
77 %b = or <8 x i64> %a, <i64 2, i64 2, i64 2, i64 2, i64 2, i64 2, i64 2, i64 2>
81 ; CHECK-LABEL: andd512fold
84 define <16 x i32> @andd512fold(<16 x i32> %y, <16 x i32>* %x) {
86 %a = load <16 x i32>, <16 x i32>* %x, align 4
87 %b = and <16 x i32> %y, %a
91 ; CHECK-LABEL: andqbrst
92 ; CHECK: vpandq (%rdi){1to8}, %zmm
94 define <8 x i64> @andqbrst(<8 x i64> %p1, i64* %ap) {
96 %a = load i64, i64* %ap, align 8
97 %b = insertelement <8 x i64> undef, i64 %a, i32 0
98 %c = shufflevector <8 x i64> %b, <8 x i64> undef, <8 x i32> zeroinitializer
99 %d = and <8 x i64> %p1, %c