2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512dq | FileCheck %s
4 declare <8 x i64> @llvm.x86.avx512.mask.cvtpd2qq.512(<8 x double>, <8 x i64>, i8, i32)
6 define <8 x i64>@test_int_x86_avx512_mask_cvt_pd2qq_512(<8 x double> %x0, <8 x i64> %x1, i8 %x2) {
7 ; CHECK-LABEL: test_int_x86_avx512_mask_cvt_pd2qq_512:
9 ; CHECK-NEXT: kmovb %edi, %k1
10 ; CHECK-NEXT: vcvtpd2qq {ru-sae}, %zmm0, %zmm1 {%k1}
11 ; CHECK-NEXT: vcvtpd2qq {rn-sae}, %zmm0, %zmm0
12 ; CHECK-NEXT: vpaddq %zmm0, %zmm1, %zmm0
14 %res = call <8 x i64> @llvm.x86.avx512.mask.cvtpd2qq.512(<8 x double> %x0, <8 x i64> %x1, i8 %x2, i32 2)
15 %res1 = call <8 x i64> @llvm.x86.avx512.mask.cvtpd2qq.512(<8 x double> %x0, <8 x i64> %x1, i8 -1, i32 0)
16 %res2 = add <8 x i64> %res, %res1
20 declare <8 x i64> @llvm.x86.avx512.mask.cvtpd2uqq.512(<8 x double>, <8 x i64>, i8, i32)
22 define <8 x i64>@test_int_x86_avx512_mask_cvt_pd2uqq_512(<8 x double> %x0, <8 x i64> %x1, i8 %x2) {
23 ; CHECK-LABEL: test_int_x86_avx512_mask_cvt_pd2uqq_512:
25 ; CHECK-NEXT: kmovb %edi, %k1
26 ; CHECK-NEXT: vcvtpd2uqq {ru-sae}, %zmm0, %zmm1 {%k1}
27 ; CHECK-NEXT: vcvtpd2uqq {rn-sae}, %zmm0, %zmm0
28 ; CHECK-NEXT: vpaddq %zmm0, %zmm1, %zmm0
30 %res = call <8 x i64> @llvm.x86.avx512.mask.cvtpd2uqq.512(<8 x double> %x0, <8 x i64> %x1, i8 %x2, i32 2)
31 %res1 = call <8 x i64> @llvm.x86.avx512.mask.cvtpd2uqq.512(<8 x double> %x0, <8 x i64> %x1, i8 -1, i32 0)
32 %res2 = add <8 x i64> %res, %res1
36 declare <8 x i64> @llvm.x86.avx512.mask.cvtps2qq.512(<8 x float>, <8 x i64>, i8, i32)
38 define <8 x i64>@test_int_x86_avx512_mask_cvt_ps2qq_512(<8 x float> %x0, <8 x i64> %x1, i8 %x2) {
39 ; CHECK-LABEL: test_int_x86_avx512_mask_cvt_ps2qq_512:
41 ; CHECK-NEXT: kmovb %edi, %k1
42 ; CHECK-NEXT: vcvtps2qq {ru-sae}, %ymm0, %zmm1 {%k1}
43 ; CHECK-NEXT: vcvtps2qq {rn-sae}, %ymm0, %zmm0
44 ; CHECK-NEXT: vpaddq %zmm0, %zmm1, %zmm0
46 %res = call <8 x i64> @llvm.x86.avx512.mask.cvtps2qq.512(<8 x float> %x0, <8 x i64> %x1, i8 %x2, i32 2)
47 %res1 = call <8 x i64> @llvm.x86.avx512.mask.cvtps2qq.512(<8 x float> %x0, <8 x i64> %x1, i8 -1, i32 0)
48 %res2 = add <8 x i64> %res, %res1
52 declare <8 x i64> @llvm.x86.avx512.mask.cvtps2uqq.512(<8 x float>, <8 x i64>, i8, i32)
54 define <8 x i64>@test_int_x86_avx512_mask_cvt_ps2uqq_512(<8 x float> %x0, <8 x i64> %x1, i8 %x2) {
55 ; CHECK-LABEL: test_int_x86_avx512_mask_cvt_ps2uqq_512:
57 ; CHECK-NEXT: kmovb %edi, %k1
58 ; CHECK-NEXT: vcvtps2uqq {ru-sae}, %ymm0, %zmm1 {%k1}
59 ; CHECK-NEXT: vcvtps2uqq {rn-sae}, %ymm0, %zmm0
60 ; CHECK-NEXT: vpaddq %zmm0, %zmm1, %zmm0
62 %res = call <8 x i64> @llvm.x86.avx512.mask.cvtps2uqq.512(<8 x float> %x0, <8 x i64> %x1, i8 %x2, i32 2)
63 %res1 = call <8 x i64> @llvm.x86.avx512.mask.cvtps2uqq.512(<8 x float> %x0, <8 x i64> %x1, i8 -1, i32 0)
64 %res2 = add <8 x i64> %res, %res1
68 declare <8 x double> @llvm.x86.avx512.mask.cvtqq2pd.512(<8 x i64>, <8 x double>, i8, i32)
70 define <8 x double>@test_int_x86_avx512_mask_cvt_qq2pd_512(<8 x i64> %x0, <8 x double> %x1, i8 %x2) {
71 ; CHECK-LABEL: test_int_x86_avx512_mask_cvt_qq2pd_512:
73 ; CHECK-NEXT: kmovb %edi, %k1
74 ; CHECK-NEXT: vcvtqq2pd %zmm0, %zmm1 {%k1}
75 ; CHECK-NEXT: vcvtqq2pd {rn-sae}, %zmm0, %zmm0
76 ; CHECK-NEXT: vaddpd %zmm0, %zmm1, %zmm0
78 %res = call <8 x double> @llvm.x86.avx512.mask.cvtqq2pd.512(<8 x i64> %x0, <8 x double> %x1, i8 %x2, i32 4)
79 %res1 = call <8 x double> @llvm.x86.avx512.mask.cvtqq2pd.512(<8 x i64> %x0, <8 x double> %x1, i8 -1, i32 0)
80 %res2 = fadd <8 x double> %res, %res1
81 ret <8 x double> %res2
84 declare <8 x float> @llvm.x86.avx512.mask.cvtqq2ps.512(<8 x i64>, <8 x float>, i8, i32)
86 define <8 x float>@test_int_x86_avx512_mask_cvt_qq2ps_512(<8 x i64> %x0, <8 x float> %x1, i8 %x2) {
87 ; CHECK-LABEL: test_int_x86_avx512_mask_cvt_qq2ps_512:
89 ; CHECK-NEXT: kmovb %edi, %k1
90 ; CHECK-NEXT: vcvtqq2ps %zmm0, %ymm1 {%k1}
91 ; CHECK-NEXT: vcvtqq2ps {rn-sae}, %zmm0, %ymm0
92 ; CHECK-NEXT: vaddps %ymm0, %ymm1, %ymm0
94 %res = call <8 x float> @llvm.x86.avx512.mask.cvtqq2ps.512(<8 x i64> %x0, <8 x float> %x1, i8 %x2, i32 4)
95 %res1 = call <8 x float> @llvm.x86.avx512.mask.cvtqq2ps.512(<8 x i64> %x0, <8 x float> %x1, i8 -1, i32 0)
96 %res2 = fadd <8 x float> %res, %res1
100 declare <8 x i64> @llvm.x86.avx512.mask.cvttpd2qq.512(<8 x double>, <8 x i64>, i8, i32)
102 define <8 x i64>@test_int_x86_avx512_mask_cvtt_pd2qq_512(<8 x double> %x0, <8 x i64> %x1, i8 %x2) {
103 ; CHECK-LABEL: test_int_x86_avx512_mask_cvtt_pd2qq_512:
105 ; CHECK-NEXT: kmovb %edi, %k1
106 ; CHECK-NEXT: vcvttpd2qq %zmm0, %zmm1 {%k1}
107 ; CHECK-NEXT: vcvttpd2qq {sae}, %zmm0, %zmm0
108 ; CHECK-NEXT: vpaddq %zmm0, %zmm1, %zmm0
110 %res = call <8 x i64> @llvm.x86.avx512.mask.cvttpd2qq.512(<8 x double> %x0, <8 x i64> %x1, i8 %x2, i32 4)
111 %res1 = call <8 x i64> @llvm.x86.avx512.mask.cvttpd2qq.512(<8 x double> %x0, <8 x i64> %x1, i8 -1, i32 8)
112 %res2 = add <8 x i64> %res, %res1
116 declare <8 x i64> @llvm.x86.avx512.mask.cvttpd2uqq.512(<8 x double>, <8 x i64>, i8, i32)
118 define <8 x i64>@test_int_x86_avx512_mask_cvtt_pd2uqq_512(<8 x double> %x0, <8 x i64> %x1, i8 %x2) {
119 ; CHECK-LABEL: test_int_x86_avx512_mask_cvtt_pd2uqq_512:
121 ; CHECK-NEXT: kmovb %edi, %k1
122 ; CHECK-NEXT: vcvttpd2uqq %zmm0, %zmm1 {%k1}
123 ; CHECK-NEXT: vcvttpd2uqq {sae}, %zmm0, %zmm0
124 ; CHECK-NEXT: vpaddq %zmm0, %zmm1, %zmm0
126 %res = call <8 x i64> @llvm.x86.avx512.mask.cvttpd2uqq.512(<8 x double> %x0, <8 x i64> %x1, i8 %x2, i32 4)
127 %res1 = call <8 x i64> @llvm.x86.avx512.mask.cvttpd2uqq.512(<8 x double> %x0, <8 x i64> %x1, i8 -1, i32 8)
128 %res2 = add <8 x i64> %res, %res1
132 declare <8 x i64> @llvm.x86.avx512.mask.cvttps2qq.512(<8 x float>, <8 x i64>, i8, i32)
134 define <8 x i64>@test_int_x86_avx512_mask_cvtt_ps2qq_512(<8 x float> %x0, <8 x i64> %x1, i8 %x2) {
135 ; CHECK-LABEL: test_int_x86_avx512_mask_cvtt_ps2qq_512:
137 ; CHECK-NEXT: kmovb %edi, %k1
138 ; CHECK-NEXT: vcvttps2qq %ymm0, %zmm1 {%k1}
139 ; CHECK-NEXT: vcvttps2qq {sae}, %ymm0, %zmm0
140 ; CHECK-NEXT: vpaddq %zmm0, %zmm1, %zmm0
142 %res = call <8 x i64> @llvm.x86.avx512.mask.cvttps2qq.512(<8 x float> %x0, <8 x i64> %x1, i8 %x2, i32 4)
143 %res1 = call <8 x i64> @llvm.x86.avx512.mask.cvttps2qq.512(<8 x float> %x0, <8 x i64> %x1, i8 -1, i32 8)
144 %res2 = add <8 x i64> %res, %res1
148 declare <8 x i64> @llvm.x86.avx512.mask.cvttps2uqq.512(<8 x float>, <8 x i64>, i8, i32)
150 define <8 x i64>@test_int_x86_avx512_mask_cvtt_ps2uqq_512(<8 x float> %x0, <8 x i64> %x1, i8 %x2) {
151 ; CHECK-LABEL: test_int_x86_avx512_mask_cvtt_ps2uqq_512:
153 ; CHECK-NEXT: kmovb %edi, %k1
154 ; CHECK-NEXT: vcvttps2uqq %ymm0, %zmm1 {%k1}
155 ; CHECK-NEXT: vcvttps2uqq {sae}, %ymm0, %zmm0
156 ; CHECK-NEXT: vpaddq %zmm0, %zmm1, %zmm0
158 %res = call <8 x i64> @llvm.x86.avx512.mask.cvttps2uqq.512(<8 x float> %x0, <8 x i64> %x1, i8 %x2, i32 4)
159 %res1 = call <8 x i64> @llvm.x86.avx512.mask.cvttps2uqq.512(<8 x float> %x0, <8 x i64> %x1, i8 -1, i32 8)
160 %res2 = add <8 x i64> %res, %res1
164 declare <8 x double> @llvm.x86.avx512.mask.cvtuqq2pd.512(<8 x i64>, <8 x double>, i8, i32)
166 define <8 x double>@test_int_x86_avx512_mask_cvt_uqq2pd_512(<8 x i64> %x0, <8 x double> %x1, i8 %x2) {
167 ; CHECK-LABEL: test_int_x86_avx512_mask_cvt_uqq2pd_512:
169 ; CHECK-NEXT: kmovb %edi, %k1
170 ; CHECK-NEXT: vcvtuqq2pd %zmm0, %zmm1 {%k1}
171 ; CHECK-NEXT: vcvtuqq2pd {rn-sae}, %zmm0, %zmm0
172 ; CHECK-NEXT: vaddpd %zmm0, %zmm1, %zmm0
174 %res = call <8 x double> @llvm.x86.avx512.mask.cvtuqq2pd.512(<8 x i64> %x0, <8 x double> %x1, i8 %x2, i32 4)
175 %res1 = call <8 x double> @llvm.x86.avx512.mask.cvtuqq2pd.512(<8 x i64> %x0, <8 x double> %x1, i8 -1, i32 0)
176 %res2 = fadd <8 x double> %res, %res1
177 ret <8 x double> %res2
180 declare <8 x float> @llvm.x86.avx512.mask.cvtuqq2ps.512(<8 x i64>, <8 x float>, i8, i32)
182 define <8 x float>@test_int_x86_avx512_mask_cvt_uqq2ps_512(<8 x i64> %x0, <8 x float> %x1, i8 %x2) {
183 ; CHECK-LABEL: test_int_x86_avx512_mask_cvt_uqq2ps_512:
185 ; CHECK-NEXT: kmovb %edi, %k1
186 ; CHECK-NEXT: vcvtuqq2ps %zmm0, %ymm1 {%k1}
187 ; CHECK-NEXT: vcvtuqq2ps {rn-sae}, %zmm0, %ymm0
188 ; CHECK-NEXT: vaddps %ymm0, %ymm1, %ymm0
190 %res = call <8 x float> @llvm.x86.avx512.mask.cvtuqq2ps.512(<8 x i64> %x0, <8 x float> %x1, i8 %x2, i32 4)
191 %res1 = call <8 x float> @llvm.x86.avx512.mask.cvtuqq2ps.512(<8 x i64> %x0, <8 x float> %x1, i8 -1, i32 0)
192 %res2 = fadd <8 x float> %res, %res1
193 ret <8 x float> %res2
196 declare <8 x double> @llvm.x86.avx512.mask.reduce.pd.512(<8 x double>, i32, <8 x double>, i8, i32)
197 ; CHECK-LABEL: @test_int_x86_avx512_mask_reduce_pd_512
200 ; CHECK: vreducepd {{.*}}{%k1}
203 define <8 x double>@test_int_x86_avx512_mask_reduce_pd_512(<8 x double> %x0, <8 x double> %x2, i8 %x3) {
204 %res = call <8 x double> @llvm.x86.avx512.mask.reduce.pd.512(<8 x double> %x0, i32 8, <8 x double> %x2, i8 %x3, i32 4)
205 %res1 = call <8 x double> @llvm.x86.avx512.mask.reduce.pd.512(<8 x double> %x0, i32 4, <8 x double> %x2, i8 -1, i32 8)
206 %res2 = fadd <8 x double> %res, %res1
207 ret <8 x double> %res2
210 declare <16 x float> @llvm.x86.avx512.mask.reduce.ps.512(<16 x float>, i32, <16 x float>, i16, i32)
211 ; CHECK-LABEL: @test_int_x86_avx512_mask_reduce_ps_512
218 define <16 x float>@test_int_x86_avx512_mask_reduce_ps_512(<16 x float> %x0, <16 x float> %x2, i16 %x3) {
219 %res = call <16 x float> @llvm.x86.avx512.mask.reduce.ps.512(<16 x float> %x0, i32 44, <16 x float> %x2, i16 %x3, i32 8)
220 %res1 = call <16 x float> @llvm.x86.avx512.mask.reduce.ps.512(<16 x float> %x0, i32 11, <16 x float> %x2, i16 -1, i32 4)
221 %res2 = fadd <16 x float> %res, %res1
222 ret <16 x float> %res2
225 declare <8 x double> @llvm.x86.avx512.mask.range.pd.512(<8 x double>, <8 x double>, i32, <8 x double>, i8, i32)
226 ; CHECK-LABEL: @test_int_x86_avx512_mask_range_pd_512
233 define <8 x double>@test_int_x86_avx512_mask_range_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x3, i8 %x4) {
234 %res = call <8 x double> @llvm.x86.avx512.mask.range.pd.512(<8 x double> %x0, <8 x double> %x1, i32 8, <8 x double> %x3, i8 %x4, i32 4)
235 %res1 = call <8 x double> @llvm.x86.avx512.mask.range.pd.512(<8 x double> %x0, <8 x double> %x1, i32 4, <8 x double> %x3, i8 -1, i32 8)
236 %res2 = fadd <8 x double> %res, %res1
237 ret <8 x double> %res2
240 declare <16 x float> @llvm.x86.avx512.mask.range.ps.512(<16 x float>, <16 x float>, i32, <16 x float>, i16, i32)
242 ; CHECK-LABEL: @test_int_x86_avx512_mask_range_ps_512
249 define <16 x float>@test_int_x86_avx512_mask_range_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x3, i16 %x4) {
250 %res = call <16 x float> @llvm.x86.avx512.mask.range.ps.512(<16 x float> %x0, <16 x float> %x1, i32 88, <16 x float> %x3, i16 %x4, i32 4)
251 %res1 = call <16 x float> @llvm.x86.avx512.mask.range.ps.512(<16 x float> %x0, <16 x float> %x1, i32 4, <16 x float> %x3, i16 -1, i32 8)
252 %res2 = fadd <16 x float> %res, %res1
253 ret <16 x float> %res2
256 declare <4 x float> @llvm.x86.avx512.mask.reduce.ss(<4 x float>, <4 x float>,<4 x float>, i8, i32, i32)
258 ; CHECK-LABEL: @test_int_x86_avx512_mask_reduce_ss
265 define <4 x float>@test_int_x86_avx512_mask_reduce_ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x3, i8 %x4) {
266 %res = call <4 x float> @llvm.x86.avx512.mask.reduce.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x3, i8 %x4, i32 4, i32 4)
267 %res1 = call <4 x float> @llvm.x86.avx512.mask.reduce.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x3, i8 -1, i32 4, i32 8)
268 %res2 = fadd <4 x float> %res, %res1
269 ret <4 x float> %res2
272 declare <4 x float> @llvm.x86.avx512.mask.range.ss(<4 x float>, <4 x float>,<4 x float>, i8, i32, i32)
273 ; CHECK-LABEL: @test_int_x86_avx512_mask_range_ss
281 define <4 x float>@test_int_x86_avx512_mask_range_ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x3, i8 %x4) {
282 %res = call <4 x float> @llvm.x86.avx512.mask.range.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x3, i8 %x4, i32 4, i32 8)
283 %res1 = call <4 x float> @llvm.x86.avx512.mask.range.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x3, i8 -1, i32 4, i32 8)
284 %res2 = fadd <4 x float> %res, %res1
285 ret <4 x float> %res2
288 declare <2 x double> @llvm.x86.avx512.mask.reduce.sd(<2 x double>, <2 x double>,<2 x double>, i8, i32, i32)
290 ; CHECK-LABEL: @test_int_x86_avx512_mask_reduce_sd
297 define <2 x double>@test_int_x86_avx512_mask_reduce_sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x3, i8 %x4) {
298 %res = call <2 x double> @llvm.x86.avx512.mask.reduce.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x3, i8 %x4, i32 4, i32 4)
299 %res1 = call <2 x double> @llvm.x86.avx512.mask.reduce.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x3, i8 -1, i32 4, i32 8)
300 %res2 = fadd <2 x double> %res, %res1
301 ret <2 x double> %res2
304 declare <2 x double> @llvm.x86.avx512.mask.range.sd(<2 x double>, <2 x double>,<2 x double>, i8, i32, i32)
305 ; CHECK-LABEL: @test_int_x86_avx512_mask_range_sd
312 define <2 x double>@test_int_x86_avx512_mask_range_sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x3, i8 %x4) {
313 %res = call <2 x double> @llvm.x86.avx512.mask.range.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x3, i8 %x4, i32 4, i32 4)
314 %res1 = call <2 x double> @llvm.x86.avx512.mask.range.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x3, i8 -1, i32 4, i32 8)
315 %res2 = fadd <2 x double> %res, %res1
316 ret <2 x double> %res2