1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 -mattr=+sse4.1 | FileCheck %s
4 ; Verify that we produce movss instead of blendvps when possible.
6 ;CHECK-LABEL: vsel_float:
10 define <4 x float> @vsel_float(<4 x float> %v1, <4 x float> %v2) {
11 %vsel = select <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x float> %v1, <4 x float> %v2
15 ;CHECK-LABEL: vsel_4xi8:
19 define <4 x i8> @vsel_4xi8(<4 x i8> %v1, <4 x i8> %v2) {
20 %vsel = select <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x i8> %v1, <4 x i8> %v2
24 ;CHECK-LABEL: vsel_8xi16:
26 ; <i1 true, i1 false, i1 false, i1 false, i1 true, i1 false, i1 false, i1 false>
27 ; which translates into the boolean mask (big endian representation):
29 ; '1' means takes the first argument, '0' means takes the second argument.
30 ; This is the opposite of the intel syntax, thus we expect
31 ; the inverted mask: 11101110 = 238.
32 ; According to the ABI:
33 ; v1 is in xmm0 => first argument is xmm0.
34 ; v2 is in xmm1 => second argument is xmm1.
35 ;CHECK: pblendw $238, %xmm1, %xmm0
37 define <8 x i16> @vsel_8xi16(<8 x i16> %v1, <8 x i16> %v2) {
38 %vsel = select <8 x i1> <i1 true, i1 false, i1 false, i1 false, i1 true, i1 false, i1 false, i1 false>, <8 x i16> %v1, <8 x i16> %v2