1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 -mattr=+sse4.1 | FileCheck %s
4 ; Verify that we produce movss instead of blendvps when possible.
6 ;CHECK-LABEL: vsel_float:
10 define <4 x float> @vsel_float(<4 x float> %v1, <4 x float> %v2) {
11 %vsel = select <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x float> %v1, <4 x float> %v2
15 ;CHECK-LABEL: vsel_4xi8:
19 define <4 x i8> @vsel_4xi8(<4 x i8> %v1, <4 x i8> %v2) {
20 %vsel = select <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x i8> %v1, <4 x i8> %v2
25 ; We do not have native support for v8i16 blends and we have to use the
26 ; blendvb instruction or a sequence of NAND/OR/AND. Make sure that we do not
27 ; reduce the mask in this case.
28 ;CHECK-LABEL: vsel_8xi16:
33 define <8 x i16> @vsel_8xi16(<8 x i16> %v1, <8 x i16> %v2) {
34 %vsel = select <8 x i1> <i1 true, i1 false, i1 false, i1 false, i1 true, i1 false, i1 false, i1 false>, <8 x i16> %v1, <8 x i16> %v2