1 ; RUN: llc < %s -mcpu=x86-64 | FileCheck %s -check-prefix=CHECK-NOSSSE3
2 ; RUN: llc < %s -mcpu=core2 | FileCheck %s -check-prefix=CHECK-SSSE3
3 ; RUN: llc < %s -mcpu=core-avx2 | FileCheck %s -check-prefix=CHECK-AVX2
4 ; RUN: llc < %s -mcpu=core-avx2 -x86-experimental-vector-widening-legalization | FileCheck %s -check-prefix=CHECK-WIDE-AVX2
5 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
6 target triple = "x86_64-unknown-linux-gnu"
8 declare <8 x i16> @llvm.bswap.v8i16(<8 x i16>)
9 declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>)
10 declare <2 x i64> @llvm.bswap.v2i64(<2 x i64>)
12 define <8 x i16> @test1(<8 x i16> %v) #0 {
14 %r = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %v)
17 ; CHECK-NOSSSE3-LABEL: @test1
28 ; CHECK-SSSE3-LABEL: @test1
30 ; CHECK-SSSE3-NEXT: retq
32 ; CHECK-AVX2-LABEL: @test1
34 ; CHECK-AVX2-NEXT: retq
36 ; CHECK-WIDE-AVX2-LABEL: @test1
37 ; CHECK-WIDE-AVX2: vpshufb
38 ; CHECK-WIDE-AVX2-NEXT: retq
41 define <4 x i32> @test2(<4 x i32> %v) #0 {
43 %r = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %v)
46 ; CHECK-NOSSSE3-LABEL: @test2
47 ; CHECK-NOSSSE3: bswapl
48 ; CHECK-NOSSSE3: bswapl
49 ; CHECK-NOSSSE3: bswapl
50 ; CHECK-NOSSSE3: bswapl
53 ; CHECK-SSSE3-LABEL: @test2
55 ; CHECK-SSSE3-NEXT: retq
57 ; CHECK-AVX2-LABEL: @test2
59 ; CHECK-AVX2-NEXT: retq
61 ; CHECK-WIDE-AVX2-LABEL: @test2
62 ; CHECK-WIDE-AVX2: vpshufb
63 ; CHECK-WIDE-AVX2-NEXT: retq
66 define <2 x i64> @test3(<2 x i64> %v) #0 {
68 %r = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %v)
71 ; CHECK-NOSSSE3-LABEL: @test3
72 ; CHECK-NOSSSE3: bswapq
73 ; CHECK-NOSSSE3: bswapq
76 ; CHECK-SSSE3-LABEL: @test3
78 ; CHECK-SSSE3-NEXT: retq
80 ; CHECK-AVX2-LABEL: @test3
82 ; CHECK-AVX2-NEXT: retq
84 ; CHECK-WIDE-AVX2-LABEL: @test3
85 ; CHECK-WIDE-AVX2: vpshufb
86 ; CHECK-WIDE-AVX2-NEXT: retq
89 declare <16 x i16> @llvm.bswap.v16i16(<16 x i16>)
90 declare <8 x i32> @llvm.bswap.v8i32(<8 x i32>)
91 declare <4 x i64> @llvm.bswap.v4i64(<4 x i64>)
93 define <16 x i16> @test4(<16 x i16> %v) #0 {
95 %r = call <16 x i16> @llvm.bswap.v16i16(<16 x i16> %v)
98 ; CHECK-SSSE3-LABEL: @test4
100 ; CHECK-SSSE3: pshufb
101 ; CHECK-SSSE3-NEXT: retq
103 ; CHECK-AVX2-LABEL: @test4
104 ; CHECK-AVX2: vpshufb
105 ; CHECK-AVX2-NEXT: retq
107 ; CHECK-WIDE-AVX2-LABEL: @test4
108 ; CHECK-WIDE-AVX2: vpshufb
109 ; CHECK-WIDE-AVX2-NEXT: retq
112 define <8 x i32> @test5(<8 x i32> %v) #0 {
114 %r = call <8 x i32> @llvm.bswap.v8i32(<8 x i32> %v)
117 ; CHECK-SSSE3-LABEL: @test5
118 ; CHECK-SSSE3: pshufb
119 ; CHECK-SSSE3: pshufb
120 ; CHECK-SSSE3-NEXT: retq
122 ; CHECK-AVX2-LABEL: @test5
123 ; CHECK-AVX2: vpshufb
124 ; CHECK-AVX2-NEXT: retq
126 ; CHECK-WIDE-AVX2-LABEL: @test5
127 ; CHECK-WIDE-AVX2: vpshufb
128 ; CHECK-WIDE-AVX2-NEXT: retq
131 define <4 x i64> @test6(<4 x i64> %v) #0 {
133 %r = call <4 x i64> @llvm.bswap.v4i64(<4 x i64> %v)
136 ; CHECK-SSSE3-LABEL: @test6
137 ; CHECK-SSSE3: pshufb
138 ; CHECK-SSSE3: pshufb
139 ; CHECK-SSSE3-NEXT: retq
141 ; CHECK-AVX2-LABEL: @test6
142 ; CHECK-AVX2: vpshufb
143 ; CHECK-AVX2-NEXT: retq
145 ; CHECK-WIDE-AVX2-LABEL: @test6
146 ; CHECK-WIDE-AVX2: vpshufb
147 ; CHECK-WIDE-AVX2-NEXT: retq
150 declare <4 x i16> @llvm.bswap.v4i16(<4 x i16>)
152 define <4 x i16> @test7(<4 x i16> %v) #0 {
154 %r = call <4 x i16> @llvm.bswap.v4i16(<4 x i16> %v)
157 ; CHECK-SSSE3-LABEL: @test7
158 ; CHECK-SSSE3: pshufb
159 ; CHECK-SSSE3: psrld $16
160 ; CHECK-SSSE3-NEXT: retq
162 ; CHECK-AVX2-LABEL: @test7
163 ; CHECK-AVX2: vpshufb
164 ; CHECK-AVX2: vpsrld $16
165 ; CHECK-AVX2-NEXT: retq
167 ; CHECK-WIDE-AVX2-LABEL: @test7
168 ; CHECK-WIDE-AVX2: vpshufb
169 ; CHECK-WIDE-AVX2-NEXT: retq
172 attributes #0 = { nounwind uwtable }