1 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s
4 ; Verify that each of the following test cases is folded into a single
5 ; instruction which performs a blend operation.
7 define <2 x i64> @test1(<2 x i64> %a, <2 x i64> %b) {
8 %shuf1 = shufflevector <2 x i64> %a, <2 x i64> zeroinitializer, <2 x i32><i32 0, i32 2>
9 %shuf2 = shufflevector <2 x i64> %b, <2 x i64> zeroinitializer, <2 x i32><i32 2, i32 1>
10 %or = or <2 x i64> %shuf1, %shuf2
20 define <4 x i32> @test2(<4 x i32> %a, <4 x i32> %b) {
21 %shuf1 = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32><i32 4, i32 4, i32 2, i32 3>
22 %shuf2 = shufflevector <4 x i32> %b, <4 x i32> zeroinitializer, <4 x i32><i32 0, i32 1, i32 4, i32 4>
23 %or = or <4 x i32> %shuf1, %shuf2
32 define <2 x i64> @test3(<2 x i64> %a, <2 x i64> %b) {
33 %shuf1 = shufflevector <2 x i64> %a, <2 x i64> zeroinitializer, <2 x i32><i32 2, i32 1>
34 %shuf2 = shufflevector <2 x i64> %b, <2 x i64> zeroinitializer, <2 x i32><i32 0, i32 2>
35 %or = or <2 x i64> %shuf1, %shuf2
44 define <4 x i32> @test4(<4 x i32> %a, <4 x i32> %b) {
45 %shuf1 = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32><i32 0, i32 4, i32 4, i32 4>
46 %shuf2 = shufflevector <4 x i32> %b, <4 x i32> zeroinitializer, <4 x i32><i32 4, i32 1, i32 2, i32 3>
47 %or = or <4 x i32> %shuf1, %shuf2
57 define <4 x i32> @test5(<4 x i32> %a, <4 x i32> %b) {
58 %shuf1 = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32><i32 4, i32 1, i32 2, i32 3>
59 %shuf2 = shufflevector <4 x i32> %b, <4 x i32> zeroinitializer, <4 x i32><i32 0, i32 4, i32 4, i32 4>
60 %or = or <4 x i32> %shuf1, %shuf2
69 define <4 x i32> @test6(<4 x i32> %a, <4 x i32> %b) {
70 %shuf1 = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32><i32 0, i32 1, i32 4, i32 4>
71 %shuf2 = shufflevector <4 x i32> %b, <4 x i32> zeroinitializer, <4 x i32><i32 4, i32 4, i32 2, i32 3>
72 %or = or <4 x i32> %shuf1, %shuf2
81 define <4 x i32> @test7(<4 x i32> %a, <4 x i32> %b) {
82 %and1 = and <4 x i32> %a, <i32 -1, i32 -1, i32 0, i32 0>
83 %and2 = and <4 x i32> %b, <i32 0, i32 0, i32 -1, i32 -1>
84 %or = or <4 x i32> %and1, %and2
93 define <2 x i64> @test8(<2 x i64> %a, <2 x i64> %b) {
94 %and1 = and <2 x i64> %a, <i64 -1, i64 0>
95 %and2 = and <2 x i64> %b, <i64 0, i64 -1>
96 %or = or <2 x i64> %and1, %and2
106 define <4 x i32> @test9(<4 x i32> %a, <4 x i32> %b) {
107 %and1 = and <4 x i32> %a, <i32 0, i32 0, i32 -1, i32 -1>
108 %and2 = and <4 x i32> %b, <i32 -1, i32 -1, i32 0, i32 0>
109 %or = or <4 x i32> %and1, %and2
118 define <2 x i64> @test10(<2 x i64> %a, <2 x i64> %b) {
119 %and1 = and <2 x i64> %a, <i64 0, i64 -1>
120 %and2 = and <2 x i64> %b, <i64 -1, i64 0>
121 %or = or <2 x i64> %and1, %and2
124 ; CHECK-LABEL: test10
130 define <4 x i32> @test11(<4 x i32> %a, <4 x i32> %b) {
131 %and1 = and <4 x i32> %a, <i32 -1, i32 0, i32 0, i32 0>
132 %and2 = and <4 x i32> %b, <i32 0, i32 -1, i32 -1, i32 -1>
133 %or = or <4 x i32> %and1, %and2
136 ; CHECK-LABEL: test11
143 define <4 x i32> @test12(<4 x i32> %a, <4 x i32> %b) {
144 %and1 = and <4 x i32> %a, <i32 0, i32 -1, i32 -1, i32 -1>
145 %and2 = and <4 x i32> %b, <i32 -1, i32 0, i32 0, i32 0>
146 %or = or <4 x i32> %and1, %and2
149 ; CHECK-LABEL: test12
155 ; Verify that the following test cases are folded into single shuffles.
157 define <4 x i32> @test13(<4 x i32> %a, <4 x i32> %b) {
158 %shuf1 = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32><i32 1, i32 1, i32 4, i32 4>
159 %shuf2 = shufflevector <4 x i32> %b, <4 x i32> zeroinitializer, <4 x i32><i32 4, i32 4, i32 2, i32 3>
160 %or = or <4 x i32> %shuf1, %shuf2
163 ; CHECK-LABEL: test13
169 define <2 x i64> @test14(<2 x i64> %a, <2 x i64> %b) {
170 %shuf1 = shufflevector <2 x i64> %a, <2 x i64> zeroinitializer, <2 x i32><i32 0, i32 2>
171 %shuf2 = shufflevector <2 x i64> %b, <2 x i64> zeroinitializer, <2 x i32><i32 2, i32 0>
172 %or = or <2 x i64> %shuf1, %shuf2
175 ; CHECK-LABEL: test14
182 define <4 x i32> @test15(<4 x i32> %a, <4 x i32> %b) {
183 %shuf1 = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32><i32 4, i32 4, i32 2, i32 1>
184 %shuf2 = shufflevector <4 x i32> %b, <4 x i32> zeroinitializer, <4 x i32><i32 2, i32 1, i32 4, i32 4>
185 %or = or <4 x i32> %shuf1, %shuf2
188 ; CHECK-LABEL: test15
196 define <2 x i64> @test16(<2 x i64> %a, <2 x i64> %b) {
197 %shuf1 = shufflevector <2 x i64> %a, <2 x i64> zeroinitializer, <2 x i32><i32 2, i32 0>
198 %shuf2 = shufflevector <2 x i64> %b, <2 x i64> zeroinitializer, <2 x i32><i32 0, i32 2>
199 %or = or <2 x i64> %shuf1, %shuf2
202 ; CHECK-LABEL: test16
209 ; Verify that the dag-combiner does not fold a OR of two shuffles into a single
210 ; shuffle instruction when the shuffle indexes are not compatible.
212 define <4 x i32> @test17(<4 x i32> %a, <4 x i32> %b) {
213 %shuf1 = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32><i32 4, i32 0, i32 4, i32 2>
214 %shuf2 = shufflevector <4 x i32> %b, <4 x i32> zeroinitializer, <4 x i32><i32 0, i32 1, i32 4, i32 4>
215 %or = or <4 x i32> %shuf1, %shuf2
218 ; CHECK-LABEL: test17
223 define <4 x i32> @test18(<4 x i32> %a, <4 x i32> %b) {
224 %shuf1 = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32><i32 4, i32 0, i32 4, i32 4>
225 %shuf2 = shufflevector <4 x i32> %b, <4 x i32> zeroinitializer, <4 x i32><i32 0, i32 4, i32 4, i32 4>
226 %or = or <4 x i32> %shuf1, %shuf2
229 ; CHECK-LABEL: test18
234 define <4 x i32> @test19(<4 x i32> %a, <4 x i32> %b) {
235 %shuf1 = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32><i32 4, i32 0, i32 4, i32 3>
236 %shuf2 = shufflevector <4 x i32> %b, <4 x i32> zeroinitializer, <4 x i32><i32 0, i32 4, i32 2, i32 2>
237 %or = or <4 x i32> %shuf1, %shuf2
240 ; CHECK-LABEL: test19
245 define <2 x i64> @test20(<2 x i64> %a, <2 x i64> %b) {
246 %shuf1 = shufflevector <2 x i64> %a, <2 x i64> zeroinitializer, <2 x i32><i32 0, i32 2>
247 %shuf2 = shufflevector <2 x i64> %b, <2 x i64> zeroinitializer, <2 x i32><i32 0, i32 2>
248 %or = or <2 x i64> %shuf1, %shuf2
251 ; CHECK-LABEL: test20
258 define <2 x i64> @test21(<2 x i64> %a, <2 x i64> %b) {
259 %shuf1 = shufflevector <2 x i64> %a, <2 x i64> zeroinitializer, <2 x i32><i32 2, i32 0>
260 %shuf2 = shufflevector <2 x i64> %b, <2 x i64> zeroinitializer, <2 x i32><i32 2, i32 0>
261 %or = or <2 x i64> %shuf1, %shuf2
264 ; CHECK-LABEL: test21
269 ; Verify that the DAGCombiner doesn't crash in the attempt to check if a shuffle
270 ; with illegal type has a legal mask. Method 'isShuffleMaskLegal' only knows how to
271 ; handle legal vector value types.
272 define <4 x i8> @test_crash(<4 x i8> %a, <4 x i8> %b) {
273 %shuf1 = shufflevector <4 x i8> %a, <4 x i8> zeroinitializer, <4 x i32><i32 4, i32 4, i32 2, i32 3>
274 %shuf2 = shufflevector <4 x i8> %b, <4 x i8> zeroinitializer, <4 x i32><i32 0, i32 1, i32 4, i32 4>
275 %or = or <4 x i8> %shuf1, %shuf2
278 ; CHECK-LABEL: test_crash