1 ; RUN: llc -march=x86-64 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-64
2 ; RUN: llc -march=x86 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-32
3 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
4 target triple = "x86_64-apple-macosx10.10.0"
6 define zeroext i8 @test_udivrem_zext_ah(i8 %x, i8 %y) {
7 ; CHECK-LABEL: test_udivrem_zext_ah
9 ; CHECK: movzbl %ah, [[REG_REM:%[a-z0-9]+]]
10 ; CHECK: movb %al, ([[REG_ZPTR:%[a-z0-9]+]])
11 ; CHECK: movl [[REG_REM]], %eax
19 define zeroext i8 @test_urem_zext_ah(i8 %x, i8 %y) {
20 ; CHECK-LABEL: test_urem_zext_ah
22 ; CHECK: movzbl %ah, %eax
28 define i8 @test_urem_noext_ah(i8 %x, i8 %y) {
29 ; CHECK-LABEL: test_urem_noext_ah
30 ; CHECK: divb [[REG_X:%[a-z0-9]+]]
31 ; CHECK: movzbl %ah, %eax
32 ; CHECK: addb [[REG_X]], %al
39 define i64 @test_urem_zext64_ah(i8 %x, i8 %y) {
40 ; CHECK-LABEL: test_urem_zext64_ah
42 ; CHECK: movzbl %ah, %eax
43 ; CHECK-32: xorl %edx, %edx
46 %2 = zext i8 %1 to i64
50 define signext i8 @test_sdivrem_sext_ah(i8 %x, i8 %y) {
51 ; CHECK-LABEL: test_sdivrem_sext_ah
54 ; CHECK: movsbl %ah, [[REG_REM:%[a-z0-9]+]]
55 ; CHECK: movb %al, ([[REG_ZPTR]])
56 ; CHECK: movl [[REG_REM]], %eax
64 define signext i8 @test_srem_sext_ah(i8 %x, i8 %y) {
65 ; CHECK-LABEL: test_srem_sext_ah
68 ; CHECK: movsbl %ah, %eax
74 define i8 @test_srem_noext_ah(i8 %x, i8 %y) {
75 ; CHECK-LABEL: test_srem_noext_ah
77 ; CHECK: idivb [[REG_X:%[a-z0-9]+]]
78 ; CHECK: movsbl %ah, %eax
79 ; CHECK: addb [[REG_X]], %al
86 define i64 @test_srem_sext64_ah(i8 %x, i8 %y) {
87 ; CHECK-LABEL: test_srem_sext64_ah
90 ; CHECK: movsbl %ah, %eax
91 ; CHECK-32: movl %eax, %edx
92 ; CHECK-32: sarl $31, %edx
93 ; CHECK-64: movsbq %al, %rax
96 %2 = sext i8 %1 to i64
100 @z = external global i8