1 ; RUN: llc < %s -march=x86 -mcpu=corei7 -relocation-model=pic | FileCheck %s -check-prefix=PIC
2 ; RUN: llc < %s -march=x86 -mcpu=corei7 -relocation-model=static | FileCheck %s -check-prefix=STATIC
4 ; Make sure the common loop invariant A is hoisted up to preheader,
5 ; since too many registers are needed to subsume it into the addressing modes.
6 ; It's safe to sink A in when it's not pic.
9 ; PIC: movlpd %xmm0, -4([[REG:%e[a-z]+]])
10 ; PIC: addl $4, [[REG]]
11 ; PIC: decl {{%e[[a-z]+}}
15 ; STATIC: movlpd %xmm0, -4(%ecx)
16 ; STATIC: addl $4, %ecx
20 @A = global [16 x [16 x i32]] zeroinitializer, align 32 ; <[16 x [16 x i32]]*> [#uses=2]
22 define void @test(i32 %row, i32 %N.in) nounwind {
24 %N = bitcast i32 %N.in to i32 ; <i32> [#uses=1]
25 %tmp5 = icmp sgt i32 %N.in, 0 ; <i1> [#uses=1]
26 br i1 %tmp5, label %cond_true, label %return
28 cond_true: ; preds = %cond_true, %entry
29 %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %cond_true ] ; <i32> [#uses=2]
30 %i.0.0 = bitcast i32 %indvar to i32 ; <i32> [#uses=2]
31 %tmp2 = add i32 %i.0.0, 1 ; <i32> [#uses=1]
32 %tmp = getelementptr [16 x [16 x i32]]* @A, i32 0, i32 %row, i32 %tmp2 ; <i32*> [#uses=1]
33 store i32 4, i32* %tmp
34 %tmp5.upgrd.1 = add i32 %i.0.0, 2 ; <i32> [#uses=1]
35 %tmp7 = getelementptr [16 x [16 x i32]]* @A, i32 0, i32 %row, i32 %tmp5.upgrd.1 ; <i32*> [#uses=1]
36 store i32 5, i32* %tmp7
37 %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
38 %exitcond = icmp eq i32 %indvar.next, %N ; <i1> [#uses=1]
39 br i1 %exitcond, label %return, label %cond_true
41 return: ; preds = %cond_true, %entry