1 ; RUN: llc < %s -march=x86-64 -O3 -asm-verbose=false | FileCheck %s
2 target datalayout = "e-p:64:64:64"
3 target triple = "x86_64-unknown-unknown"
5 ; Full strength reduction reduces register pressure from 5 to 4 here.
6 ; Instruction selection should use the FLAGS value from the dec for
7 ; the branch. Scheduling should push the adds upwards.
10 ; CHECK: movsd (%rsi), %xmm0
11 ; CHECK: addq $8, %rsi
12 ; CHECK: mulsd (%rdx), %xmm0
13 ; CHECK: addq $8, %rdx
14 ; CHECK: movsd %xmm0, (%rdi)
15 ; CHECK: addq $8, %rdi
19 define void @full_me_0(double* nocapture %A, double* nocapture %B, double* nocapture %C, i64 %n) nounwind {
21 %t0 = icmp sgt i64 %n, 0
22 br i1 %t0, label %loop, label %return
25 %i = phi i64 [ %i.next, %loop ], [ 0, %entry ]
26 %Ai = getelementptr inbounds double* %A, i64 %i
27 %Bi = getelementptr inbounds double* %B, i64 %i
28 %Ci = getelementptr inbounds double* %C, i64 %i
29 %t1 = load double* %Bi
30 %t2 = load double* %Ci
31 %m = fmul double %t1, %t2
32 store double %m, double* %Ai
33 %i.next = add nsw i64 %i, 1
34 %exitcond = icmp eq i64 %i.next, %n
35 br i1 %exitcond, label %return, label %loop
41 ; Mostly-full strength reduction means we do full strength reduction on all
42 ; except for the offsets.
44 ; Given a choice between constant offsets -2048 and 2048, choose the negative
45 ; value, because at boundary conditions it has a smaller encoding.
46 ; TODO: That's an over-general heuristic. It would be better for the target
47 ; to indicate what the encoding cost would be. Then using a 2048 offset
48 ; would be better on x86-64, since the start value would be 0 instead of
51 ; CHECK: mostly_full_me_0:
52 ; CHECK: movsd -2048(%rsi), %xmm0
53 ; CHECK: mulsd -2048(%rdx), %xmm0
54 ; CHECK: movsd %xmm0, -2048(%rdi)
55 ; CHECK: movsd (%rsi), %xmm0
56 ; CHECK: addq $8, %rsi
57 ; CHECK: divsd (%rdx), %xmm0
58 ; CHECK: addq $8, %rdx
59 ; CHECK: movsd %xmm0, (%rdi)
60 ; CHECK: addq $8, %rdi
64 define void @mostly_full_me_0(double* nocapture %A, double* nocapture %B, double* nocapture %C, i64 %n) nounwind {
66 %t0 = icmp sgt i64 %n, 0
67 br i1 %t0, label %loop, label %return
70 %i = phi i64 [ %i.next, %loop ], [ 0, %entry ]
71 %Ai = getelementptr inbounds double* %A, i64 %i
72 %Bi = getelementptr inbounds double* %B, i64 %i
73 %Ci = getelementptr inbounds double* %C, i64 %i
74 %t1 = load double* %Bi
75 %t2 = load double* %Ci
76 %m = fmul double %t1, %t2
77 store double %m, double* %Ai
79 %Aj = getelementptr inbounds double* %A, i64 %j
80 %Bj = getelementptr inbounds double* %B, i64 %j
81 %Cj = getelementptr inbounds double* %C, i64 %j
82 %t3 = load double* %Bj
83 %t4 = load double* %Cj
84 %o = fdiv double %t3, %t4
85 store double %o, double* %Aj
86 %i.next = add nsw i64 %i, 1
87 %exitcond = icmp eq i64 %i.next, %n
88 br i1 %exitcond, label %return, label %loop
94 ; A minor variation on mostly_full_me_0.
95 ; Prefer to start the indvar at 0.
97 ; CHECK: mostly_full_me_1:
98 ; CHECK: movsd (%rsi), %xmm0
99 ; CHECK: mulsd (%rdx), %xmm0
100 ; CHECK: movsd %xmm0, (%rdi)
101 ; CHECK: movsd -2048(%rsi), %xmm0
102 ; CHECK: addq $8, %rsi
103 ; CHECK: divsd -2048(%rdx), %xmm0
104 ; CHECK: addq $8, %rdx
105 ; CHECK: movsd %xmm0, -2048(%rdi)
106 ; CHECK: addq $8, %rdi
110 define void @mostly_full_me_1(double* nocapture %A, double* nocapture %B, double* nocapture %C, i64 %n) nounwind {
112 %t0 = icmp sgt i64 %n, 0
113 br i1 %t0, label %loop, label %return
116 %i = phi i64 [ %i.next, %loop ], [ 0, %entry ]
117 %Ai = getelementptr inbounds double* %A, i64 %i
118 %Bi = getelementptr inbounds double* %B, i64 %i
119 %Ci = getelementptr inbounds double* %C, i64 %i
120 %t1 = load double* %Bi
121 %t2 = load double* %Ci
122 %m = fmul double %t1, %t2
123 store double %m, double* %Ai
125 %Aj = getelementptr inbounds double* %A, i64 %j
126 %Bj = getelementptr inbounds double* %B, i64 %j
127 %Cj = getelementptr inbounds double* %C, i64 %j
128 %t3 = load double* %Bj
129 %t4 = load double* %Cj
130 %o = fdiv double %t3, %t4
131 store double %o, double* %Aj
132 %i.next = add nsw i64 %i, 1
133 %exitcond = icmp eq i64 %i.next, %n
134 br i1 %exitcond, label %return, label %loop
140 ; A slightly less minor variation on mostly_full_me_0.
142 ; CHECK: mostly_full_me_2:
143 ; CHECK: movsd (%rsi), %xmm0
144 ; CHECK: mulsd (%rdx), %xmm0
145 ; CHECK: movsd %xmm0, (%rdi)
146 ; CHECK: movsd -4096(%rsi), %xmm0
147 ; CHECK: addq $8, %rsi
148 ; CHECK: divsd -4096(%rdx), %xmm0
149 ; CHECK: addq $8, %rdx
150 ; CHECK: movsd %xmm0, -4096(%rdi)
151 ; CHECK: addq $8, %rdi
155 define void @mostly_full_me_2(double* nocapture %A, double* nocapture %B, double* nocapture %C, i64 %n) nounwind {
157 %t0 = icmp sgt i64 %n, 0
158 br i1 %t0, label %loop, label %return
161 %i = phi i64 [ %i.next, %loop ], [ 0, %entry ]
163 %Ak = getelementptr inbounds double* %A, i64 %k
164 %Bk = getelementptr inbounds double* %B, i64 %k
165 %Ck = getelementptr inbounds double* %C, i64 %k
166 %t1 = load double* %Bk
167 %t2 = load double* %Ck
168 %m = fmul double %t1, %t2
169 store double %m, double* %Ak
171 %Aj = getelementptr inbounds double* %A, i64 %j
172 %Bj = getelementptr inbounds double* %B, i64 %j
173 %Cj = getelementptr inbounds double* %C, i64 %j
174 %t3 = load double* %Bj
175 %t4 = load double* %Cj
176 %o = fdiv double %t3, %t4
177 store double %o, double* %Aj
178 %i.next = add nsw i64 %i, 1
179 %exitcond = icmp eq i64 %i.next, %n
180 br i1 %exitcond, label %return, label %loop
186 ; In this test, the counting IV exit value is used, so full strength reduction
187 ; would not reduce register pressure. IndVarSimplify ought to simplify such
188 ; cases away, but it's useful here to verify that LSR's register pressure
189 ; heuristics are working as expected.
192 ; CHECK: movsd (%rsi,%rax,8), %xmm0
193 ; CHECK: mulsd (%rdx,%rax,8), %xmm0
194 ; CHECK: movsd %xmm0, (%rdi,%rax,8)
196 ; CHECK: cmpq %rax, %rcx
199 define i64 @count_me_0(double* nocapture %A, double* nocapture %B, double* nocapture %C, i64 %n) nounwind {
201 %t0 = icmp sgt i64 %n, 0
202 br i1 %t0, label %loop, label %return
205 %i = phi i64 [ %i.next, %loop ], [ 0, %entry ]
206 %Ai = getelementptr inbounds double* %A, i64 %i
207 %Bi = getelementptr inbounds double* %B, i64 %i
208 %Ci = getelementptr inbounds double* %C, i64 %i
209 %t1 = load double* %Bi
210 %t2 = load double* %Ci
211 %m = fmul double %t1, %t2
212 store double %m, double* %Ai
213 %i.next = add nsw i64 %i, 1
214 %exitcond = icmp eq i64 %i.next, %n
215 br i1 %exitcond, label %return, label %loop
218 %q = phi i64 [ 0, %entry ], [ %i.next, %loop ]
222 ; In this test, the trip count value is used, so full strength reduction
223 ; would not reduce register pressure.
224 ; (though it would reduce register pressure inside the loop...)
227 ; CHECK: movsd (%rsi,%rax,8), %xmm0
228 ; CHECK: mulsd (%rdx,%rax,8), %xmm0
229 ; CHECK: movsd %xmm0, (%rdi,%rax,8)
231 ; CHECK: cmpq %rax, %rcx
234 define i64 @count_me_1(double* nocapture %A, double* nocapture %B, double* nocapture %C, i64 %n) nounwind {
236 %t0 = icmp sgt i64 %n, 0
237 br i1 %t0, label %loop, label %return
240 %i = phi i64 [ %i.next, %loop ], [ 0, %entry ]
241 %Ai = getelementptr inbounds double* %A, i64 %i
242 %Bi = getelementptr inbounds double* %B, i64 %i
243 %Ci = getelementptr inbounds double* %C, i64 %i
244 %t1 = load double* %Bi
245 %t2 = load double* %Ci
246 %m = fmul double %t1, %t2
247 store double %m, double* %Ai
248 %i.next = add nsw i64 %i, 1
249 %exitcond = icmp eq i64 %i.next, %n
250 br i1 %exitcond, label %return, label %loop
253 %q = phi i64 [ 0, %entry ], [ %n, %loop ]
257 ; Full strength reduction doesn't save any registers here because the
258 ; loop tripcount is a constant.
261 ; CHECK: movl $10, %eax
264 ; CHECK: movsd -40(%rdi,%rax,8), %xmm0
265 ; CHECK: addsd -40(%rsi,%rax,8), %xmm0
266 ; CHECK: movsd %xmm0, -40(%rdx,%rax,8)
267 ; CHECK: movsd (%rdi,%rax,8), %xmm0
268 ; CHECK: subsd (%rsi,%rax,8), %xmm0
269 ; CHECK: movsd %xmm0, (%rdx,%rax,8)
271 ; CHECK: cmpq $5010, %rax
274 define void @count_me_2(double* nocapture %A, double* nocapture %B, double* nocapture %C) nounwind {
279 %i = phi i64 [ 0, %entry ], [ %i.next, %loop ]
281 %Ai = getelementptr double* %A, i64 %i5
282 %t2 = load double* %Ai
283 %Bi = getelementptr double* %B, i64 %i5
284 %t4 = load double* %Bi
285 %t5 = fadd double %t2, %t4
286 %Ci = getelementptr double* %C, i64 %i5
287 store double %t5, double* %Ci
288 %i10 = add i64 %i, 10
289 %Ai10 = getelementptr double* %A, i64 %i10
290 %t9 = load double* %Ai10
291 %Bi10 = getelementptr double* %B, i64 %i10
292 %t11 = load double* %Bi10
293 %t12 = fsub double %t9, %t11
294 %Ci10 = getelementptr double* %C, i64 %i10
295 store double %t12, double* %Ci10
296 %i.next = add i64 %i, 1
297 %exitcond = icmp eq i64 %i.next, 5000
298 br i1 %exitcond, label %return, label %loop
304 ; This should be fully strength-reduced to reduce register pressure.
309 ; CHECK: movsd (%rdi), %xmm0
310 ; CHECK: addsd (%rsi), %xmm0
311 ; CHECK: movsd %xmm0, (%rdx)
312 ; CHECK: movsd 40(%rdi), %xmm0
313 ; CHECK: addq $8, %rdi
314 ; CHECK: subsd 40(%rsi), %xmm0
315 ; CHECK: addq $8, %rsi
316 ; CHECK: movsd %xmm0, 40(%rdx)
317 ; CHECK: addq $8, %rdx
321 define void @full_me_1(double* nocapture %A, double* nocapture %B, double* nocapture %C, i64 %n) nounwind {
326 %i = phi i64 [ 0, %entry ], [ %i.next, %loop ]
328 %Ai = getelementptr double* %A, i64 %i5
329 %t2 = load double* %Ai
330 %Bi = getelementptr double* %B, i64 %i5
331 %t4 = load double* %Bi
332 %t5 = fadd double %t2, %t4
333 %Ci = getelementptr double* %C, i64 %i5
334 store double %t5, double* %Ci
335 %i10 = add i64 %i, 10
336 %Ai10 = getelementptr double* %A, i64 %i10
337 %t9 = load double* %Ai10
338 %Bi10 = getelementptr double* %B, i64 %i10
339 %t11 = load double* %Bi10
340 %t12 = fsub double %t9, %t11
341 %Ci10 = getelementptr double* %C, i64 %i10
342 store double %t12, double* %Ci10
343 %i.next = add i64 %i, 1
344 %exitcond = icmp eq i64 %i.next, %n
345 br i1 %exitcond, label %return, label %loop
351 ; This is a variation on full_me_0 in which the 0,+,1 induction variable
352 ; has a non-address use, pinning that value in a register.
356 ; CHECK: movsd (%r15,%r13,8), %xmm0
357 ; CHECK: mulsd (%r14,%r13,8), %xmm0
358 ; CHECK: movsd %xmm0, (%r12,%r13,8)
360 ; CHECK: cmpq %r13, %rbx
363 declare void @use(i64)
365 define void @count_me_3(double* nocapture %A, double* nocapture %B, double* nocapture %C, i64 %n) nounwind {
367 %t0 = icmp sgt i64 %n, 0
368 br i1 %t0, label %loop, label %return
371 %i = phi i64 [ %i.next, %loop ], [ 0, %entry ]
372 call void @use(i64 %i)
373 %Ai = getelementptr inbounds double* %A, i64 %i
374 %Bi = getelementptr inbounds double* %B, i64 %i
375 %Ci = getelementptr inbounds double* %C, i64 %i
376 %t1 = load double* %Bi
377 %t2 = load double* %Ci
378 %m = fmul double %t1, %t2
379 store double %m, double* %Ai
380 %i.next = add nsw i64 %i, 1
381 %exitcond = icmp eq i64 %i.next, %n
382 br i1 %exitcond, label %return, label %loop
388 ; LSR should use only one indvar for the inner loop.
393 ; CHECK-NEXT: addl (%r{{[^,]*}},%rdi,4), %e
394 ; CHECK-NEXT: incq %rdi
395 ; CHECK-NEXT: cmpq %rdi, %r{{[^,]*}}
398 %struct.anon = type { i32, [4200 x i32] }
400 @bars = common global [123123 x %struct.anon] zeroinitializer, align 32 ; <[123123 x %struct.anon]*> [#uses=2]
402 define i32 @asd(i32 %n) nounwind readonly {
404 %0 = icmp sgt i32 %n, 0 ; <i1> [#uses=1]
405 br i1 %0, label %bb.nph14, label %bb5
407 bb.nph14: ; preds = %entry
408 %tmp18 = zext i32 %n to i64 ; <i64> [#uses=1]
411 bb: ; preds = %bb3, %bb.nph14
412 %indvar16 = phi i64 [ 0, %bb.nph14 ], [ %indvar.next17, %bb3 ] ; <i64> [#uses=3]
413 %s.113 = phi i32 [ 0, %bb.nph14 ], [ %s.0.lcssa, %bb3 ] ; <i32> [#uses=2]
414 %scevgep2526 = getelementptr [123123 x %struct.anon]* @bars, i64 0, i64 %indvar16, i32 0 ; <i32*> [#uses=1]
415 %1 = load i32* %scevgep2526, align 4 ; <i32> [#uses=2]
416 %2 = icmp sgt i32 %1, 0 ; <i1> [#uses=1]
417 br i1 %2, label %bb.nph, label %bb3
419 bb.nph: ; preds = %bb
420 %tmp23 = sext i32 %1 to i64 ; <i64> [#uses=1]
423 bb1: ; preds = %bb.nph, %bb1
424 %indvar = phi i64 [ 0, %bb.nph ], [ %tmp19, %bb1 ] ; <i64> [#uses=2]
425 %s.07 = phi i32 [ %s.113, %bb.nph ], [ %4, %bb1 ] ; <i32> [#uses=1]
426 %c.08 = getelementptr [123123 x %struct.anon]* @bars, i64 0, i64 %indvar16, i32 1, i64 %indvar ; <i32*> [#uses=1]
427 %3 = load i32* %c.08, align 4 ; <i32> [#uses=1]
428 %4 = add nsw i32 %3, %s.07 ; <i32> [#uses=2]
429 %tmp19 = add i64 %indvar, 1 ; <i64> [#uses=2]
430 %5 = icmp sgt i64 %tmp23, %tmp19 ; <i1> [#uses=1]
431 br i1 %5, label %bb1, label %bb3
433 bb3: ; preds = %bb1, %bb
434 %s.0.lcssa = phi i32 [ %s.113, %bb ], [ %4, %bb1 ] ; <i32> [#uses=2]
435 %indvar.next17 = add i64 %indvar16, 1 ; <i64> [#uses=2]
436 %exitcond = icmp eq i64 %indvar.next17, %tmp18 ; <i1> [#uses=1]
437 br i1 %exitcond, label %bb5, label %bb
439 bb5: ; preds = %bb3, %entry
440 %s.1.lcssa = phi i32 [ 0, %entry ], [ %s.0.lcssa, %bb3 ] ; <i32> [#uses=1]