1 ; RUN: llc -march=x86-64 -mcpu=core2 -enable-misched -misched=shuffle -misched-bottomup < %s
3 ; ...should pass. See PR12324: misched bringup
5 ; Interesting MachineScheduler cases.
7 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
10 ; After coalescing, we have a dead superreg (RAX) definition.
12 ; CHECK: xorl %esi, %esi
13 ; CHECK: movl $32, %ecx
15 define fastcc void @_preextrapolate_helper() nounwind uwtable ssp {
17 br i1 undef, label %for.cond.preheader, label %if.end
19 for.cond.preheader: ; preds = %entry
20 call void @llvm.memcpy.p0i8.p0i8.i64(i8* undef, i8* null, i64 128, i32 4, i1 false) nounwind
23 if.end: ; preds = %entry