1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 -mattr=+sse4.1 | FileCheck %s
3 ;CHECK-LABEL: vsel_float:
6 define <4 x float> @vsel_float(<4 x float> %v1, <4 x float> %v2) {
7 %vsel = select <4 x i1> <i1 true, i1 false, i1 true, i1 true>, <4 x float> %v1, <4 x float> %v2
12 ;CHECK-LABEL: vsel_4xi8:
15 define <4 x i8> @vsel_4xi8(<4 x i8> %v1, <4 x i8> %v2) {
16 %vsel = select <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i8> %v1, <4 x i8> %v2
20 ;CHECK-LABEL: vsel_4xi16:
23 define <4 x i16> @vsel_4xi16(<4 x i16> %v1, <4 x i16> %v2) {
24 %vsel = select <4 x i1> <i1 true, i1 false, i1 true, i1 true>, <4 x i16> %v1, <4 x i16> %v2
29 ;CHECK-LABEL: vsel_i32:
32 define <4 x i32> @vsel_i32(<4 x i32> %v1, <4 x i32> %v2) {
33 %vsel = select <4 x i1> <i1 true, i1 true, i1 false, i1 true>, <4 x i32> %v1, <4 x i32> %v2
38 ;CHECK-LABEL: vsel_double:
41 define <4 x double> @vsel_double(<4 x double> %v1, <4 x double> %v2) {
42 %vsel = select <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x double> %v1, <4 x double> %v2
43 ret <4 x double> %vsel
47 ;CHECK-LABEL: vsel_i64:
50 define <4 x i64> @vsel_i64(<4 x i64> %v1, <4 x i64> %v2) {
51 %vsel = select <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x i64> %v1, <4 x i64> %v2
56 ;CHECK-LABEL: vsel_i8:
59 define <16 x i8> @vsel_i8(<16 x i8> %v1, <16 x i8> %v2) {
60 %vsel = select <16 x i1> <i1 true, i1 false, i1 false, i1 false, i1 true, i1 false, i1 false, i1 false, i1 true, i1 false, i1 false, i1 false, i1 true, i1 false, i1 false, i1 false>, <16 x i8> %v1, <16 x i8> %v2
64 ;; TEST blend + compares
66 define <2 x double> @A(<2 x double> %x, <2 x double> %y) {
69 %max_is_x = fcmp oge <2 x double> %x, %y
70 %max = select <2 x i1> %max_is_x, <2 x double> %x, <2 x double> %y
75 define <2 x double> @B(<2 x double> %x, <2 x double> %y) {
78 %min_is_x = fcmp ult <2 x double> %x, %y
79 %min = select <2 x i1> %min_is_x, <2 x double> %x, <2 x double> %y
84 define void @float_crash() nounwind {
86 %merge205vector_func.i = select <4 x i1> undef, <4 x double> undef, <4 x double> undef
87 %extract214vector_func.i = extractelement <4 x double> %merge205vector_func.i, i32 0
88 store double %extract214vector_func.i, double addrspace(1)* undef, align 8
92 ; If we can figure out a blend has a constant mask, we should emit the
93 ; blend instruction with an immediate mask
94 define <2 x double> @constant_blendvpd(<2 x double> %xy, <2 x double> %ab) {
95 ; In this case, we emit a simple movss
96 ; CHECK-LABEL: constant_blendvpd
99 %1 = select <2 x i1> <i1 true, i1 false>, <2 x double> %xy, <2 x double> %ab
103 define <4 x float> @constant_blendvps(<4 x float> %xyzw, <4 x float> %abcd) {
104 ; CHECK-LABEL: constant_blendvps
108 %1 = select <4 x i1> <i1 false, i1 false, i1 false, i1 true>, <4 x float> %xyzw, <4 x float> %abcd
112 define <16 x i8> @constant_pblendvb(<16 x i8> %xyzw, <16 x i8> %abcd) {
113 ; CHECK-LABEL: constant_pblendvb:
117 %1 = select <16 x i1> <i1 false, i1 false, i1 true, i1 false, i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 true, i1 false, i1 true, i1 true, i1 true, i1 false>, <16 x i8> %xyzw, <16 x i8> %abcd
120 declare <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8>, <16 x i8>, <16 x i8>)
121 declare <4 x float> @llvm.x86.sse41.blendvps(<4 x float>, <4 x float>, <4 x float>)
122 declare <2 x double> @llvm.x86.sse41.blendvpd(<2 x double>, <2 x double>, <2 x double>)