1 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=AMD64
2 ; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64
4 ; TAILJMPri64 should not receive "callee-saved" registers beyond epilogue.
7 ; AMD64-NOT: %{{e[a-z]|rbx|rbp|r10|r12|r13|r14|r15}}
10 ; WIN64-NOT: %{{e[a-z]|rbx|rsi|rdi|rbp|r12|r13|r14|r15}}
12 %class = type { [8 x i8] }
13 %vt = type { i32 (...)** }
15 define %vt* @_ZN4llvm9UnsetInit20convertInitializerToEPNS_5RecTyE(%class*
16 %this, %vt* %Ty) align 2 {
18 %0 = bitcast %vt* %Ty to %vt* (%vt*, %class*)***
19 %vtable = load %vt* (%vt*, %class*)*** %0, align 8
20 %vfn = getelementptr inbounds %vt* (%vt*, %class*)** %vtable, i64 4
21 %1 = load %vt* (%vt*, %class*)** %vfn, align 8
22 %call = tail call %vt* %1(%vt* %Ty, %class* %this)