1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
2 ; There are no MMX operations in @t1
4 define void @t1(i32 %a, x86_mmx* %P) nounwind {
5 %tmp12 = shl i32 %a, 12
6 %tmp21 = insertelement <2 x i32> undef, i32 %tmp12, i32 1
7 %tmp22 = insertelement <2 x i32> %tmp21, i32 0, i32 0
8 %tmp23 = bitcast <2 x i32> %tmp22 to x86_mmx
9 store x86_mmx %tmp23, x86_mmx* %P
18 define <4 x float> @t2(<4 x float>* %P) nounwind {
19 %tmp1 = load <4 x float>* %P
20 %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x i32> < i32 4, i32 4, i32 4, i32 0 >
27 define <4 x float> @t3(<4 x float>* %P) nounwind {
28 %tmp1 = load <4 x float>* %P
29 %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x i32> < i32 2, i32 3, i32 4, i32 4 >
36 define <4 x float> @t4(<4 x float>* %P) nounwind {
37 %tmp1 = load <4 x float>* %P
38 %tmp2 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp1, <4 x i32> < i32 7, i32 0, i32 0, i32 0 >