1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 | FileCheck %s
3 define <4 x i32> @add_4i32(<4 x i32> %a0, <4 x i32> %a1) {
4 ;CHECK-LABEL: @add_4i32
6 ;CHECK-NEXT: paddd %xmm1, %xmm0
8 %1 = add <4 x i32> %a0, <i32 1, i32 -2, i32 3, i32 -4>
9 %2 = add <4 x i32> %a1, <i32 -1, i32 2, i32 -3, i32 4>
10 %3 = add <4 x i32> %1, %2
14 define <4 x i32> @add_4i32_commute(<4 x i32> %a0, <4 x i32> %a1) {
15 ;CHECK-LABEL: @add_4i32_commute
17 ;CHECK-NEXT: paddd %xmm1, %xmm0
19 %1 = add <4 x i32> <i32 1, i32 -2, i32 3, i32 -4>, %a0
20 %2 = add <4 x i32> <i32 -1, i32 2, i32 -3, i32 4>, %a1
21 %3 = add <4 x i32> %1, %2
25 define <4 x i32> @mul_4i32(<4 x i32> %a0, <4 x i32> %a1) {
26 ;CHECK-LABEL: @mul_4i32
28 ;CHECK-NEXT: pmulld %xmm1, %xmm0
29 ;CHECK-NEXT: pmulld .LCPI2_0(%rip), %xmm0
31 %1 = mul <4 x i32> %a0, <i32 1, i32 2, i32 3, i32 4>
32 %2 = mul <4 x i32> %a1, <i32 4, i32 3, i32 2, i32 1>
33 %3 = mul <4 x i32> %1, %2
37 define <4 x i32> @mul_4i32_commute(<4 x i32> %a0, <4 x i32> %a1) {
38 ;CHECK-LABEL: @mul_4i32_commute
40 ;CHECK-NEXT: pmulld %xmm1, %xmm0
41 ;CHECK-NEXT: pmulld .LCPI3_0(%rip), %xmm0
43 %1 = mul <4 x i32> <i32 1, i32 2, i32 3, i32 4>, %a0
44 %2 = mul <4 x i32> <i32 4, i32 3, i32 2, i32 1>, %a1
45 %3 = mul <4 x i32> %1, %2
49 define <4 x i32> @and_4i32(<4 x i32> %a0, <4 x i32> %a1) {
50 ;CHECK-LABEL: @and_4i32
52 ;CHECK-NEXT: andps %xmm1, %xmm0
53 ;CHECK-NEXT: andps .LCPI4_0(%rip), %xmm0
55 %1 = and <4 x i32> %a0, <i32 -2, i32 -2, i32 3, i32 3>
56 %2 = and <4 x i32> %a1, <i32 -1, i32 -1, i32 1, i32 1>
57 %3 = and <4 x i32> %1, %2
61 define <4 x i32> @and_4i32_commute(<4 x i32> %a0, <4 x i32> %a1) {
62 ;CHECK-LABEL: @and_4i32_commute
64 ;CHECK-NEXT: andps %xmm1, %xmm0
65 ;CHECK-NEXT: andps .LCPI5_0(%rip), %xmm0
67 %1 = and <4 x i32> <i32 -2, i32 -2, i32 3, i32 3>, %a0
68 %2 = and <4 x i32> <i32 -1, i32 -1, i32 1, i32 1>, %a1
69 %3 = and <4 x i32> %1, %2
73 define <4 x i32> @or_4i32(<4 x i32> %a0, <4 x i32> %a1) {
74 ;CHECK-LABEL: @or_4i32
76 ;CHECK-NEXT: orps %xmm1, %xmm0
77 ;CHECK-NEXT: orps .LCPI6_0(%rip), %xmm0
79 %1 = or <4 x i32> %a0, <i32 -2, i32 -2, i32 3, i32 3>
80 %2 = or <4 x i32> %a1, <i32 -1, i32 -1, i32 1, i32 1>
81 %3 = or <4 x i32> %1, %2
85 define <4 x i32> @or_4i32_commute(<4 x i32> %a0, <4 x i32> %a1) {
86 ;CHECK-LABEL: @or_4i32_commute
88 ;CHECK-NEXT: orps %xmm1, %xmm0
89 ;CHECK-NEXT: orps .LCPI7_0(%rip), %xmm0
91 %1 = or <4 x i32> <i32 -2, i32 -2, i32 3, i32 3>, %a0
92 %2 = or <4 x i32> <i32 -1, i32 -1, i32 1, i32 1>, %a1
93 %3 = or <4 x i32> %1, %2
97 define <4 x i32> @xor_4i32(<4 x i32> %a0, <4 x i32> %a1) {
98 ;CHECK-LABEL: @xor_4i32
100 ;CHECK-NEXT: xorps %xmm1, %xmm0
101 ;CHECK-NEXT: xorps .LCPI8_0(%rip), %xmm0
103 %1 = xor <4 x i32> %a0, <i32 -2, i32 -2, i32 3, i32 3>
104 %2 = xor <4 x i32> %a1, <i32 -1, i32 -1, i32 1, i32 1>
105 %3 = xor <4 x i32> %1, %2
109 define <4 x i32> @xor_4i32_commute(<4 x i32> %a0, <4 x i32> %a1) {
110 ;CHECK-LABEL: @xor_4i32_commute
112 ;CHECK-NEXT: xorps %xmm1, %xmm0
113 ;CHECK-NEXT: xorps .LCPI9_0(%rip), %xmm0
115 %1 = xor <4 x i32> <i32 -2, i32 -2, i32 3, i32 3>, %a0
116 %2 = xor <4 x i32> <i32 -1, i32 -1, i32 1, i32 1>, %a1
117 %3 = xor <4 x i32> %1, %2