1 ; RUN: llc -march=x86-64 -mcpu=corei7 -mattr=-sse4.1 < %s | FileCheck %s
3 ; Verify that we correctly fold target specific packed vector shifts by
4 ; immediate count into a simple build_vector when the elements of the vector
5 ; in input to the packed shift are all constants or undef.
7 define <8 x i16> @test1() {
8 %1 = tail call <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16> <i16 1, i16 2, i16 4, i16 8, i16 1, i16 2, i16 4, i16 8>, i32 3)
16 define <8 x i16> @test2() {
17 %1 = tail call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> <i16 4, i16 8, i16 16, i16 32, i16 4, i16 8, i16 16, i16 32>, i32 3)
25 define <8 x i16> @test3() {
26 %1 = tail call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> <i16 4, i16 8, i16 16, i16 32, i16 4, i16 8, i16 16, i16 32>, i32 3)
34 define <4 x i32> @test4() {
35 %1 = tail call <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32> <i32 1, i32 2, i32 4, i32 8>, i32 3)
43 define <4 x i32> @test5() {
44 %1 = tail call <4 x i32> @llvm.x86.sse2.psrli.d(<4 x i32> <i32 4, i32 8, i32 16, i32 32>, i32 3)
52 define <4 x i32> @test6() {
53 %1 = tail call <4 x i32> @llvm.x86.sse2.psrai.d(<4 x i32> <i32 4, i32 8, i32 16, i32 32>, i32 3)
61 define <2 x i64> @test7() {
62 %1 = tail call <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64> <i64 1, i64 2>, i32 3)
70 define <2 x i64> @test8() {
71 %1 = tail call <2 x i64> @llvm.x86.sse2.psrli.q(<2 x i64> <i64 8, i64 16>, i32 3)
79 define <8 x i16> @test9() {
80 %1 = tail call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> <i16 15, i16 8, i16 undef, i16 undef, i16 31, i16 undef, i16 64, i16 128>, i32 3)
88 define <4 x i32> @test10() {
89 %1 = tail call <4 x i32> @llvm.x86.sse2.psrai.d(<4 x i32> <i32 undef, i32 8, i32 undef, i32 32>, i32 3)
97 define <2 x i64> @test11() {
98 %1 = tail call <2 x i64> @llvm.x86.sse2.psrli.q(<2 x i64> <i64 undef, i64 31>, i32 3)
101 ; CHECK-LABEL: test11
106 define <8 x i16> @test12() {
107 %1 = tail call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> <i16 15, i16 8, i16 undef, i16 undef, i16 31, i16 undef, i16 64, i16 128>, i32 3)
110 ; CHECK-LABEL: test12
115 define <4 x i32> @test13() {
116 %1 = tail call <4 x i32> @llvm.x86.sse2.psrli.d(<4 x i32> <i32 undef, i32 8, i32 undef, i32 32>, i32 3)
119 ; CHECK-LABEL: test13
124 define <8 x i16> @test14() {
125 %1 = tail call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> <i16 15, i16 8, i16 undef, i16 undef, i16 31, i16 undef, i16 64, i16 128>, i32 3)
128 ; CHECK-LABEL: test14
133 define <4 x i32> @test15() {
134 %1 = tail call <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32> <i32 undef, i32 8, i32 undef, i32 32>, i32 3)
137 ; CHECK-LABEL: test15
142 define <2 x i64> @test16() {
143 %1 = tail call <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64> <i64 undef, i64 31>, i32 3)
146 ; CHECK-LABEL: test16
152 declare <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16>, i32)
153 declare <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16>, i32)
154 declare <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16>, i32)
155 declare <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32>, i32)
156 declare <4 x i32> @llvm.x86.sse2.psrli.d(<4 x i32>, i32)
157 declare <4 x i32> @llvm.x86.sse2.psrai.d(<4 x i32>, i32)
158 declare <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64>, i32)
159 declare <2 x i64> @llvm.x86.sse2.psrli.q(<2 x i64>, i32)