1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse3 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE3
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+ssse3 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSSE3
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
8 target triple = "x86_64-unknown-unknown"
10 define <2 x i64> @testv2i64(<2 x i64> %in) {
11 ; SSE2-LABEL: testv2i64:
13 ; SSE2-NEXT: movdqa %xmm0, %xmm1
14 ; SSE2-NEXT: psrlq $1, %xmm1
15 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm1
16 ; SSE2-NEXT: psubq %xmm1, %xmm0
17 ; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [3689348814741910323,3689348814741910323]
18 ; SSE2-NEXT: movdqa %xmm0, %xmm2
19 ; SSE2-NEXT: pand %xmm1, %xmm2
20 ; SSE2-NEXT: psrlq $2, %xmm0
21 ; SSE2-NEXT: pand %xmm1, %xmm0
22 ; SSE2-NEXT: paddq %xmm2, %xmm0
23 ; SSE2-NEXT: movdqa %xmm0, %xmm1
24 ; SSE2-NEXT: psrlq $4, %xmm1
25 ; SSE2-NEXT: paddq %xmm0, %xmm1
26 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm1
27 ; SSE2-NEXT: pxor %xmm0, %xmm0
28 ; SSE2-NEXT: psadbw %xmm0, %xmm1
29 ; SSE2-NEXT: movdqa %xmm1, %xmm0
32 ; SSE3-LABEL: testv2i64:
34 ; SSE3-NEXT: movdqa %xmm0, %xmm1
35 ; SSE3-NEXT: psrlq $1, %xmm1
36 ; SSE3-NEXT: pand {{.*}}(%rip), %xmm1
37 ; SSE3-NEXT: psubq %xmm1, %xmm0
38 ; SSE3-NEXT: movdqa {{.*#+}} xmm1 = [3689348814741910323,3689348814741910323]
39 ; SSE3-NEXT: movdqa %xmm0, %xmm2
40 ; SSE3-NEXT: pand %xmm1, %xmm2
41 ; SSE3-NEXT: psrlq $2, %xmm0
42 ; SSE3-NEXT: pand %xmm1, %xmm0
43 ; SSE3-NEXT: paddq %xmm2, %xmm0
44 ; SSE3-NEXT: movdqa %xmm0, %xmm1
45 ; SSE3-NEXT: psrlq $4, %xmm1
46 ; SSE3-NEXT: paddq %xmm0, %xmm1
47 ; SSE3-NEXT: pand {{.*}}(%rip), %xmm1
48 ; SSE3-NEXT: pxor %xmm0, %xmm0
49 ; SSE3-NEXT: psadbw %xmm0, %xmm1
50 ; SSE3-NEXT: movdqa %xmm1, %xmm0
53 ; SSSE3-LABEL: testv2i64:
55 ; SSSE3-NEXT: movdqa {{.*#+}} xmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
56 ; SSSE3-NEXT: movdqa %xmm0, %xmm2
57 ; SSSE3-NEXT: pand %xmm1, %xmm2
58 ; SSSE3-NEXT: movdqa {{.*#+}} xmm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
59 ; SSSE3-NEXT: movdqa %xmm3, %xmm4
60 ; SSSE3-NEXT: pshufb %xmm2, %xmm4
61 ; SSSE3-NEXT: psrlw $4, %xmm0
62 ; SSSE3-NEXT: pand %xmm1, %xmm0
63 ; SSSE3-NEXT: pshufb %xmm0, %xmm3
64 ; SSSE3-NEXT: paddb %xmm4, %xmm3
65 ; SSSE3-NEXT: pxor %xmm0, %xmm0
66 ; SSSE3-NEXT: psadbw %xmm3, %xmm0
69 ; SSE41-LABEL: testv2i64:
71 ; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
72 ; SSE41-NEXT: movdqa %xmm0, %xmm2
73 ; SSE41-NEXT: pand %xmm1, %xmm2
74 ; SSE41-NEXT: movdqa {{.*#+}} xmm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
75 ; SSE41-NEXT: movdqa %xmm3, %xmm4
76 ; SSE41-NEXT: pshufb %xmm2, %xmm4
77 ; SSE41-NEXT: psrlw $4, %xmm0
78 ; SSE41-NEXT: pand %xmm1, %xmm0
79 ; SSE41-NEXT: pshufb %xmm0, %xmm3
80 ; SSE41-NEXT: paddb %xmm4, %xmm3
81 ; SSE41-NEXT: pxor %xmm0, %xmm0
82 ; SSE41-NEXT: psadbw %xmm3, %xmm0
85 ; AVX-LABEL: testv2i64:
87 ; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
88 ; AVX-NEXT: vpand %xmm1, %xmm0, %xmm2
89 ; AVX-NEXT: vmovdqa {{.*#+}} xmm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
90 ; AVX-NEXT: vpshufb %xmm2, %xmm3, %xmm2
91 ; AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
92 ; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0
93 ; AVX-NEXT: vpshufb %xmm0, %xmm3, %xmm0
94 ; AVX-NEXT: vpaddb %xmm2, %xmm0, %xmm0
95 ; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
96 ; AVX-NEXT: vpsadbw %xmm0, %xmm1, %xmm0
98 %out = call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %in)
102 define <4 x i32> @testv4i32(<4 x i32> %in) {
103 ; SSE2-LABEL: testv4i32:
105 ; SSE2-NEXT: movdqa %xmm0, %xmm1
106 ; SSE2-NEXT: psrld $1, %xmm1
107 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm1
108 ; SSE2-NEXT: psubd %xmm1, %xmm0
109 ; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [858993459,858993459,858993459,858993459]
110 ; SSE2-NEXT: movdqa %xmm0, %xmm2
111 ; SSE2-NEXT: pand %xmm1, %xmm2
112 ; SSE2-NEXT: psrld $2, %xmm0
113 ; SSE2-NEXT: pand %xmm1, %xmm0
114 ; SSE2-NEXT: paddd %xmm2, %xmm0
115 ; SSE2-NEXT: movdqa %xmm0, %xmm1
116 ; SSE2-NEXT: psrld $4, %xmm1
117 ; SSE2-NEXT: paddd %xmm0, %xmm1
118 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm1
119 ; SSE2-NEXT: pxor %xmm0, %xmm0
120 ; SSE2-NEXT: movdqa %xmm1, %xmm2
121 ; SSE2-NEXT: punpckhdq {{.*#+}} xmm2 = xmm2[2],xmm0[2],xmm2[3],xmm0[3]
122 ; SSE2-NEXT: psadbw %xmm0, %xmm2
123 ; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
124 ; SSE2-NEXT: psadbw %xmm0, %xmm1
125 ; SSE2-NEXT: packuswb %xmm2, %xmm1
126 ; SSE2-NEXT: movdqa %xmm1, %xmm0
129 ; SSE3-LABEL: testv4i32:
131 ; SSE3-NEXT: movdqa %xmm0, %xmm1
132 ; SSE3-NEXT: psrld $1, %xmm1
133 ; SSE3-NEXT: pand {{.*}}(%rip), %xmm1
134 ; SSE3-NEXT: psubd %xmm1, %xmm0
135 ; SSE3-NEXT: movdqa {{.*#+}} xmm1 = [858993459,858993459,858993459,858993459]
136 ; SSE3-NEXT: movdqa %xmm0, %xmm2
137 ; SSE3-NEXT: pand %xmm1, %xmm2
138 ; SSE3-NEXT: psrld $2, %xmm0
139 ; SSE3-NEXT: pand %xmm1, %xmm0
140 ; SSE3-NEXT: paddd %xmm2, %xmm0
141 ; SSE3-NEXT: movdqa %xmm0, %xmm1
142 ; SSE3-NEXT: psrld $4, %xmm1
143 ; SSE3-NEXT: paddd %xmm0, %xmm1
144 ; SSE3-NEXT: pand {{.*}}(%rip), %xmm1
145 ; SSE3-NEXT: pxor %xmm0, %xmm0
146 ; SSE3-NEXT: movdqa %xmm1, %xmm2
147 ; SSE3-NEXT: punpckhdq {{.*#+}} xmm2 = xmm2[2],xmm0[2],xmm2[3],xmm0[3]
148 ; SSE3-NEXT: psadbw %xmm0, %xmm2
149 ; SSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
150 ; SSE3-NEXT: psadbw %xmm0, %xmm1
151 ; SSE3-NEXT: packuswb %xmm2, %xmm1
152 ; SSE3-NEXT: movdqa %xmm1, %xmm0
155 ; SSSE3-LABEL: testv4i32:
157 ; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
158 ; SSSE3-NEXT: movdqa %xmm0, %xmm3
159 ; SSSE3-NEXT: pand %xmm2, %xmm3
160 ; SSSE3-NEXT: movdqa {{.*#+}} xmm1 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
161 ; SSSE3-NEXT: movdqa %xmm1, %xmm4
162 ; SSSE3-NEXT: pshufb %xmm3, %xmm4
163 ; SSSE3-NEXT: psrlw $4, %xmm0
164 ; SSSE3-NEXT: pand %xmm2, %xmm0
165 ; SSSE3-NEXT: pshufb %xmm0, %xmm1
166 ; SSSE3-NEXT: paddb %xmm4, %xmm1
167 ; SSSE3-NEXT: pxor %xmm0, %xmm0
168 ; SSSE3-NEXT: movdqa %xmm1, %xmm2
169 ; SSSE3-NEXT: punpckhdq {{.*#+}} xmm2 = xmm2[2],xmm0[2],xmm2[3],xmm0[3]
170 ; SSSE3-NEXT: psadbw %xmm0, %xmm2
171 ; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
172 ; SSSE3-NEXT: psadbw %xmm0, %xmm1
173 ; SSSE3-NEXT: packuswb %xmm2, %xmm1
174 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
177 ; SSE41-LABEL: testv4i32:
179 ; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
180 ; SSE41-NEXT: movdqa %xmm0, %xmm3
181 ; SSE41-NEXT: pand %xmm2, %xmm3
182 ; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
183 ; SSE41-NEXT: movdqa %xmm1, %xmm4
184 ; SSE41-NEXT: pshufb %xmm3, %xmm4
185 ; SSE41-NEXT: psrlw $4, %xmm0
186 ; SSE41-NEXT: pand %xmm2, %xmm0
187 ; SSE41-NEXT: pshufb %xmm0, %xmm1
188 ; SSE41-NEXT: paddb %xmm4, %xmm1
189 ; SSE41-NEXT: pxor %xmm0, %xmm0
190 ; SSE41-NEXT: movdqa %xmm1, %xmm2
191 ; SSE41-NEXT: punpckhdq {{.*#+}} xmm2 = xmm2[2],xmm0[2],xmm2[3],xmm0[3]
192 ; SSE41-NEXT: psadbw %xmm0, %xmm2
193 ; SSE41-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
194 ; SSE41-NEXT: psadbw %xmm0, %xmm1
195 ; SSE41-NEXT: packuswb %xmm2, %xmm1
196 ; SSE41-NEXT: movdqa %xmm1, %xmm0
199 ; AVX-LABEL: testv4i32:
201 ; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
202 ; AVX-NEXT: vpand %xmm1, %xmm0, %xmm2
203 ; AVX-NEXT: vmovdqa {{.*#+}} xmm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
204 ; AVX-NEXT: vpshufb %xmm2, %xmm3, %xmm2
205 ; AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
206 ; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0
207 ; AVX-NEXT: vpshufb %xmm0, %xmm3, %xmm0
208 ; AVX-NEXT: vpaddb %xmm2, %xmm0, %xmm0
209 ; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
210 ; AVX-NEXT: vpunpckhdq {{.*#+}} xmm2 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
211 ; AVX-NEXT: vpsadbw %xmm2, %xmm1, %xmm2
212 ; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
213 ; AVX-NEXT: vpsadbw %xmm0, %xmm1, %xmm0
214 ; AVX-NEXT: vpackuswb %xmm2, %xmm0, %xmm0
216 %out = call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %in)
220 define <8 x i16> @testv8i16(<8 x i16> %in) {
221 ; SSE2-LABEL: testv8i16:
223 ; SSE2-NEXT: movdqa %xmm0, %xmm1
224 ; SSE2-NEXT: psrlw $1, %xmm1
225 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm1
226 ; SSE2-NEXT: psubw %xmm1, %xmm0
227 ; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [13107,13107,13107,13107,13107,13107,13107,13107]
228 ; SSE2-NEXT: movdqa %xmm0, %xmm2
229 ; SSE2-NEXT: pand %xmm1, %xmm2
230 ; SSE2-NEXT: psrlw $2, %xmm0
231 ; SSE2-NEXT: pand %xmm1, %xmm0
232 ; SSE2-NEXT: paddw %xmm2, %xmm0
233 ; SSE2-NEXT: movdqa %xmm0, %xmm1
234 ; SSE2-NEXT: psrlw $4, %xmm1
235 ; SSE2-NEXT: paddw %xmm0, %xmm1
236 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm1
237 ; SSE2-NEXT: movdqa %xmm1, %xmm0
238 ; SSE2-NEXT: psllw $8, %xmm0
239 ; SSE2-NEXT: paddb %xmm1, %xmm0
240 ; SSE2-NEXT: psrlw $8, %xmm0
243 ; SSE3-LABEL: testv8i16:
245 ; SSE3-NEXT: movdqa %xmm0, %xmm1
246 ; SSE3-NEXT: psrlw $1, %xmm1
247 ; SSE3-NEXT: pand {{.*}}(%rip), %xmm1
248 ; SSE3-NEXT: psubw %xmm1, %xmm0
249 ; SSE3-NEXT: movdqa {{.*#+}} xmm1 = [13107,13107,13107,13107,13107,13107,13107,13107]
250 ; SSE3-NEXT: movdqa %xmm0, %xmm2
251 ; SSE3-NEXT: pand %xmm1, %xmm2
252 ; SSE3-NEXT: psrlw $2, %xmm0
253 ; SSE3-NEXT: pand %xmm1, %xmm0
254 ; SSE3-NEXT: paddw %xmm2, %xmm0
255 ; SSE3-NEXT: movdqa %xmm0, %xmm1
256 ; SSE3-NEXT: psrlw $4, %xmm1
257 ; SSE3-NEXT: paddw %xmm0, %xmm1
258 ; SSE3-NEXT: pand {{.*}}(%rip), %xmm1
259 ; SSE3-NEXT: movdqa %xmm1, %xmm0
260 ; SSE3-NEXT: psllw $8, %xmm0
261 ; SSE3-NEXT: paddb %xmm1, %xmm0
262 ; SSE3-NEXT: psrlw $8, %xmm0
265 ; SSSE3-LABEL: testv8i16:
267 ; SSSE3-NEXT: movdqa {{.*#+}} xmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
268 ; SSSE3-NEXT: movdqa %xmm0, %xmm2
269 ; SSSE3-NEXT: pand %xmm1, %xmm2
270 ; SSSE3-NEXT: movdqa {{.*#+}} xmm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
271 ; SSSE3-NEXT: movdqa %xmm3, %xmm4
272 ; SSSE3-NEXT: pshufb %xmm2, %xmm4
273 ; SSSE3-NEXT: psrlw $4, %xmm0
274 ; SSSE3-NEXT: pand %xmm1, %xmm0
275 ; SSSE3-NEXT: pshufb %xmm0, %xmm3
276 ; SSSE3-NEXT: paddb %xmm4, %xmm3
277 ; SSSE3-NEXT: movdqa %xmm3, %xmm0
278 ; SSSE3-NEXT: psllw $8, %xmm0
279 ; SSSE3-NEXT: paddb %xmm3, %xmm0
280 ; SSSE3-NEXT: psrlw $8, %xmm0
283 ; SSE41-LABEL: testv8i16:
285 ; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
286 ; SSE41-NEXT: movdqa %xmm0, %xmm2
287 ; SSE41-NEXT: pand %xmm1, %xmm2
288 ; SSE41-NEXT: movdqa {{.*#+}} xmm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
289 ; SSE41-NEXT: movdqa %xmm3, %xmm4
290 ; SSE41-NEXT: pshufb %xmm2, %xmm4
291 ; SSE41-NEXT: psrlw $4, %xmm0
292 ; SSE41-NEXT: pand %xmm1, %xmm0
293 ; SSE41-NEXT: pshufb %xmm0, %xmm3
294 ; SSE41-NEXT: paddb %xmm4, %xmm3
295 ; SSE41-NEXT: movdqa %xmm3, %xmm0
296 ; SSE41-NEXT: psllw $8, %xmm0
297 ; SSE41-NEXT: paddb %xmm3, %xmm0
298 ; SSE41-NEXT: psrlw $8, %xmm0
301 ; AVX-LABEL: testv8i16:
303 ; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
304 ; AVX-NEXT: vpand %xmm1, %xmm0, %xmm2
305 ; AVX-NEXT: vmovdqa {{.*#+}} xmm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
306 ; AVX-NEXT: vpshufb %xmm2, %xmm3, %xmm2
307 ; AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
308 ; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0
309 ; AVX-NEXT: vpshufb %xmm0, %xmm3, %xmm0
310 ; AVX-NEXT: vpaddb %xmm2, %xmm0, %xmm0
311 ; AVX-NEXT: vpsllw $8, %xmm0, %xmm1
312 ; AVX-NEXT: vpaddb %xmm0, %xmm1, %xmm0
313 ; AVX-NEXT: vpsrlw $8, %xmm0, %xmm0
315 %out = call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %in)
319 define <16 x i8> @testv16i8(<16 x i8> %in) {
320 ; SSE2-LABEL: testv16i8:
322 ; SSE2-NEXT: movdqa %xmm0, %xmm1
323 ; SSE2-NEXT: psrlw $1, %xmm1
324 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm1
325 ; SSE2-NEXT: psubb %xmm1, %xmm0
326 ; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [51,51,51,51,51,51,51,51,51,51,51,51,51,51,51,51]
327 ; SSE2-NEXT: movdqa %xmm0, %xmm2
328 ; SSE2-NEXT: pand %xmm1, %xmm2
329 ; SSE2-NEXT: psrlw $2, %xmm0
330 ; SSE2-NEXT: pand %xmm1, %xmm0
331 ; SSE2-NEXT: paddb %xmm2, %xmm0
332 ; SSE2-NEXT: movdqa %xmm0, %xmm1
333 ; SSE2-NEXT: psrlw $4, %xmm1
334 ; SSE2-NEXT: paddb %xmm0, %xmm1
335 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm1
336 ; SSE2-NEXT: movdqa %xmm1, %xmm0
339 ; SSE3-LABEL: testv16i8:
341 ; SSE3-NEXT: movdqa %xmm0, %xmm1
342 ; SSE3-NEXT: psrlw $1, %xmm1
343 ; SSE3-NEXT: pand {{.*}}(%rip), %xmm1
344 ; SSE3-NEXT: psubb %xmm1, %xmm0
345 ; SSE3-NEXT: movdqa {{.*#+}} xmm1 = [51,51,51,51,51,51,51,51,51,51,51,51,51,51,51,51]
346 ; SSE3-NEXT: movdqa %xmm0, %xmm2
347 ; SSE3-NEXT: pand %xmm1, %xmm2
348 ; SSE3-NEXT: psrlw $2, %xmm0
349 ; SSE3-NEXT: pand %xmm1, %xmm0
350 ; SSE3-NEXT: paddb %xmm2, %xmm0
351 ; SSE3-NEXT: movdqa %xmm0, %xmm1
352 ; SSE3-NEXT: psrlw $4, %xmm1
353 ; SSE3-NEXT: paddb %xmm0, %xmm1
354 ; SSE3-NEXT: pand {{.*}}(%rip), %xmm1
355 ; SSE3-NEXT: movdqa %xmm1, %xmm0
358 ; SSSE3-LABEL: testv16i8:
360 ; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
361 ; SSSE3-NEXT: movdqa %xmm0, %xmm3
362 ; SSSE3-NEXT: pand %xmm2, %xmm3
363 ; SSSE3-NEXT: movdqa {{.*#+}} xmm1 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
364 ; SSSE3-NEXT: movdqa %xmm1, %xmm4
365 ; SSSE3-NEXT: pshufb %xmm3, %xmm4
366 ; SSSE3-NEXT: psrlw $4, %xmm0
367 ; SSSE3-NEXT: pand %xmm2, %xmm0
368 ; SSSE3-NEXT: pshufb %xmm0, %xmm1
369 ; SSSE3-NEXT: paddb %xmm4, %xmm1
370 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
373 ; SSE41-LABEL: testv16i8:
375 ; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
376 ; SSE41-NEXT: movdqa %xmm0, %xmm3
377 ; SSE41-NEXT: pand %xmm2, %xmm3
378 ; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
379 ; SSE41-NEXT: movdqa %xmm1, %xmm4
380 ; SSE41-NEXT: pshufb %xmm3, %xmm4
381 ; SSE41-NEXT: psrlw $4, %xmm0
382 ; SSE41-NEXT: pand %xmm2, %xmm0
383 ; SSE41-NEXT: pshufb %xmm0, %xmm1
384 ; SSE41-NEXT: paddb %xmm4, %xmm1
385 ; SSE41-NEXT: movdqa %xmm1, %xmm0
388 ; AVX-LABEL: testv16i8:
390 ; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
391 ; AVX-NEXT: vpand %xmm1, %xmm0, %xmm2
392 ; AVX-NEXT: vmovdqa {{.*#+}} xmm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
393 ; AVX-NEXT: vpshufb %xmm2, %xmm3, %xmm2
394 ; AVX-NEXT: vpsrlw $4, %xmm0, %xmm0
395 ; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0
396 ; AVX-NEXT: vpshufb %xmm0, %xmm3, %xmm0
397 ; AVX-NEXT: vpaddb %xmm2, %xmm0, %xmm0
399 %out = call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %in)
403 define <2 x i64> @foldv2i64() {
404 ; SSE-LABEL: foldv2i64:
406 ; SSE-NEXT: movaps {{.*#+}} xmm0 = [1,64]
409 ; AVX-LABEL: foldv2i64:
411 ; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [1,64]
413 %out = call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> <i64 256, i64 -1>)
417 define <4 x i32> @foldv4i32() {
418 ; SSE-LABEL: foldv4i32:
420 ; SSE-NEXT: movaps {{.*#+}} xmm0 = [1,32,0,8]
423 ; AVX-LABEL: foldv4i32:
425 ; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [1,32,0,8]
427 %out = call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> <i32 256, i32 -1, i32 0, i32 255>)
431 define <8 x i16> @foldv8i16() {
432 ; SSE-LABEL: foldv8i16:
434 ; SSE-NEXT: movaps {{.*#+}} xmm0 = [1,16,0,8,0,3,2,3]
437 ; AVX-LABEL: foldv8i16:
439 ; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [1,16,0,8,0,3,2,3]
441 %out = call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> <i16 256, i16 -1, i16 0, i16 255, i16 -65536, i16 7, i16 24, i16 88>)
445 define <16 x i8> @foldv16i8() {
446 ; SSE-LABEL: foldv16i8:
448 ; SSE-NEXT: movaps {{.*#+}} xmm0 = [0,8,0,8,0,3,2,3,7,7,1,1,1,1,1,1]
451 ; AVX-LABEL: foldv16i8:
453 ; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [0,8,0,8,0,3,2,3,7,7,1,1,1,1,1,1]
455 %out = call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> <i8 256, i8 -1, i8 0, i8 255, i8 -65536, i8 7, i8 24, i8 88, i8 -2, i8 254, i8 1, i8 2, i8 4, i8 8, i8 16, i8 32>)
459 declare <2 x i64> @llvm.ctpop.v2i64(<2 x i64>)
460 declare <4 x i32> @llvm.ctpop.v4i32(<4 x i32>)
461 declare <8 x i16> @llvm.ctpop.v8i16(<8 x i16>)
462 declare <16 x i8> @llvm.ctpop.v16i8(<16 x i8>)